NXP Semiconductors SPC5748CK0AMKU6
- Part No.:
- SPC5748CK0AMKU6
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 176-LQFP Exposed Pad
- Datasheet:
-
SPC5748CK0AMKU6.pdf
- Description:
- IC MCU 32BIT 6MB FLASH 176LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:3,294
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SPC5748CK0AMKU6 from NXP Semiconductors is an automotive-qualified Power Architecture® microcontroller featuring dual 160 MHz e200Z4 cores and one 80 MHz e200Z2 core, 6 MB on-chip flash, 768 KB SRAM with end-to-end ECC, and integrated FlexCAN FD, Ethernet AVB, and HSMv2 security. It targets vehicle gateway and domain controller applications requiring ASIL-B functional safety compliance.
For engineers reviewing the SPC5748CK0AMKU6 datasheet, SPC5748CK0AMKU6 pinout, SPC5748CK0AMKU6 application, or SPC5748CK0AMKU6 equivalent, this page delivers verified technical context, validated pin assignments for the 176-pin LQFP-EP package, confirmed automotive gateway use cases, and two production-ready alternative parts with documented functional and packaging differences.
Technical Context
The SPC5748CK0AMKU6 implements a heterogeneous multi-core architecture: two high-performance e200Z4 CPUs (160 MHz, VLE, single-precision FPU, 8 KB I-cache/4 KB D-cache) plus one e200Z2 CPU (80 MHz, VLE) for real-time task partitioning. All cores share a triple-ported 64-bit-wide memory subsystem backed by 6 MB flash and 768 KB SRAM, with full end-to-end ECC covering data, address, and bus transactions.
Its peripheral set includes eight FlexCAN3 modules (all supporting CAN FD), dual 10/100 Ethernet controllers with IEEE 1588 and AVB support, a 3-port L2 switch, four DSPI, six SPI, 18 LINFlexD, four I²C, three SAI, and dual ADCs (10-bit + 12-bit). Clocking is managed via FMPLL, FXOSC (8–40 MHz), SXOSC (32 kHz), FIRC (16 MHz), and SIRC (128 kHz), with CMU and RTC.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core(s) | 2 × e200Z4 @ 160 MHz + 1 × e200Z2 @ 80 MHz; enables parallel real-time control and communication stack execution |
| Flash Memory | 6 MB on-chip flash with triple-port controller and EEE emulation; supports concurrent read/write and robust firmware updates |
| RAM | 768 KB SRAM across three ports with ECC; provides deterministic latency for safety-critical tasks and buffer-intensive protocols |
| Functional Safety | ISO 26262 ASIL-B certified; includes FCCU, SMPUs (2×16-region), and lockstep-capable peripherals for fault detection |
| Communication Interfaces | 8 × FlexCAN FD, 2 × ENET (MII/RMII + AVB/1588), 18 × LINFlexD, 4 × DSPI, 6 × SPI, 4 × I²C; meets automotive gateway bandwidth and protocol diversity requirements |
| Security | HSMv2 hardware security module with PASS/TDM lifecycle management; enables secure boot, key provisioning, and encrypted OTA updates |
| Package | 176-pin LQFP-EP (KU); exposes all I/O domains including FlexCAN, LIN, Ethernet, USB, and uSDHC with thermal pad for automotive thermal management |
Pinout & Package
SPC5748CK0AMKU6 is housed in a 176-pin LQFP-EP (exposed pad) package measuring 24 mm × 24 mm × 1.6 mm (max), qualified for automotive temperature range (–40°C to +125°C ambient).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_HV_A / VDD_HV_B / VDD_HV_C | High-voltage I/O supply inputs | Independent 3.3 V or 5 V supplies for configurable I/O domains (CAN, LIN, Ethernet, general-purpose) |
| VDD_LV | Core logic supply input | 1.2–1.32 V supply for e200Z4/Z2 cores and internal logic; requires low-ESR decoupling per datasheet Table 8 |
| FXOSC_IN / FXOSC_OUT | Main crystal oscillator interface | Supports 8–40 MHz external crystal; feeds FMPLL for system clock generation and jitter-sensitive peripherals |
| SXOSC_IN / SXOSC_OUT | 32 kHz real-time clock oscillator | Enables low-power RTC operation and wake-up from stop modes without main crystal active |
| CAN0_TX / CAN0_RX | FlexCAN0 differential transceiver interface | Direct connection to external CAN FD transceiver; supports bit rates up to 5 Mbps with ISO 11898-1 compliance |
| ENET0_MDC / ENET0_MDIO | IEEE 802.3 MII management interface | Configures PHY registers for 10/100 Ethernet; required for AVB stream reservation and PTP timestamping |
| USB0_DP / USB0_DM | USB OTG differential data pair | Full-speed (12 Mbps) USB 2.0 OTG interface with ULPI support; used for diagnostics and firmware download |
| WKPU_IN0–WKPU_IN7 | Wake-up controller input pins | Eight dedicated inputs for asynchronous wake-up from low-power modes (e.g., LIN message, CAN activity, GPIO edge) |
Key Features
| Feature | Design Value |
|---|---|
| Dual e200Z4 + e200Z2 core configuration | Enables separation of safety-critical control (Z4) and non-safety communication stacks (Z2) under ISO 26262 partitioning requirements |
| End-to-end ECC on all memory and bus transactions | Guarantees SECDED protection for 64-bit data + 29-bit address paths, meeting ASIL-B fault coverage targets without software overhead |
| Triple-port flash controller with 3 page buffers | Allows simultaneous instruction fetch, background erase, and program operations-critical for zero-downtime firmware updates in gateways |
| Hardware Security Module v2 (HSMv2) | Provides dedicated ARM Cortex-M0+ core with cryptographic accelerators (AES-128/256, SHA-256, RSA-2048) for secure boot and key management |
| Two System Memory Protection Units (SMPU) | Each with 16 region descriptors and 16-byte granularity enforces strict memory access isolation between RTOS tasks and AUTOSAR BSW modules |
| Configurable I/O domains with voltage-level flexibility | Permits independent 3.3 V or 5 V operation for FlexCAN, LINFlexD, Ethernet, and USB domains-reducing need for level shifters in mixed-voltage systems |
Applications
| Automotive Gateway Controller | Body Domain Controller |
|---|---|
Use Scenario: Centralized vehicle network bridge aggregating CAN FD, LIN, Ethernet AVB, and FlexRay traffic between powertrain, chassis, and infotainment domains. IC Role / Device Role / Timing Role: Primary gateway MCU executing AUTOSAR Classic/Adaptive stacks, managing time-synchronized communication via IEEE 1588 PTP and AVB stream reservation. Use Value: 6 MB flash stores multiple ECU firmware images; dual Ethernet with L2 switching enables deterministic routing of safety-critical ADAS camera streams alongside infotainment video. |
Use Scenario: Integrated body control unit managing door modules, lighting, HVAC, and seat controls using LIN and CAN FD networks. IC Role / Device Role / Timing Role: Real-time scheduler coordinating 18 LINFlexD channels and 8 FlexCAN FD nodes while monitoring 246 GPIOs for switch inputs and PWM outputs. Use Value: 768 KB ECC SRAM ensures glitch-free execution of LIN schedule tables and CAN FD frame buffering during transient load events like window motor activation. |
| Electric Vehicle Battery Management Gateway | ADAS Sensor Fusion Hub |
Use Scenario: High-reliability interface between battery pack BMS (via isolated CAN FD) and vehicle controller, handling cell voltage/temperature telemetry and HV contactor control. IC Role / Device Role / Timing Role: Safety-certified gateway performing ASIL-B diagnostics, CRC validation of BMS frames, and fail-safe shutdown sequencing via GPIO-controlled relays. Use Value: FCCU and dual SMPUs detect memory corruption or timing violations; HSMv2 signs telemetry packets before forwarding to cloud via Ethernet AVB. |
Use Scenario: Aggregation and preprocessing node for radar, camera, and ultrasonic sensor data prior to fusion in central ADAS ECU. IC Role / Device Role / Timing Role: Time-synchronized acquisition hub using eMIOS channels to trigger ADC conversions aligned with radar chirps and camera exposure pulses. Use Value: Cross-Trigger Unit synchronizes 12-bit ADC sampling with PIT timers; 3×SAI interfaces stream preprocessed audio alerts over TDM to head unit without CPU intervention. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC5748GK0AMJ6 | Same core, memory, and peripheral set but in 256-pin MAPBGA package; no exposed thermal pad; different pinout and layout footprint | Preferred for space-constrained PCBs where thermal pad soldering is impractical; requires redesign of power delivery and signal routing | Select when board area is limited and thermal management can be achieved via internal copper layers instead of exposed pad |
| SPC574K7SK0MLU6 | Lower-spec variant: 4 MB flash, 512 KB SRAM, only 6 FlexCAN FD channels, no Ethernet or FlexRay; uses same 176-pin LQFP-EP package | Targeted at cost-sensitive body control units without gateway-level networking; lacks AVB/1588 and HSMv2 security features | Select when Ethernet, FlexRay, or full HSM functionality is unnecessary and BOM cost reduction is prioritized over future scalability |
Compared with SPC5748CK0AMKU6, MPC5748GK0AMJ6 offers identical functionality in a smaller BGA footprint but sacrifices thermal performance and requires PCB redesign, while SPC574K7SK0MLU6 reduces flash, RAM, and networking capability to lower cost-making it suitable only for non-gateway roles where Ethernet and full security are omitted.
Availability
SPC5748CK0AMKU6 is available at Aetrix Electronics and suitable for automotive gateway controllers, body domain controllers, EV battery management gateways, and ADAS sensor fusion hubs requiring stable component supply across extended product lifecycles.
Supply support for SPC5748CK0AMKU6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in functional safety and automotive-grade microcontrollers.
The SPC5748CK0AMKU6 belongs to NXP's SPC57 family of automotive MCUs, designed specifically for next-generation vehicle gateways and domain controllers requiring ASIL-B compliance, high-bandwidth networking, and hardware-enforced security.
FAQ
What is the operating temperature range for the SPC5748CK0AMKU6?
The SPC5748CK0AMKU6 is qualified for automotive operation from –40°C to +125°C ambient temperature, with junction temperature rated up to +150°C. This range is validated per AEC-Q100 Grade 1 requirements and supports deployment in engine bay, under-hood, and passenger compartment locations where thermal extremes occur.
Does the SPC5748CK0AMKU6 support CAN FD, and how many channels are available?
Yes, the SPC5748CK0AMKU6 integrates eight FlexCAN3 modules, all supporting CAN FD with data rates up to 5 Mbps and payload lengths up to 64 bytes. Each channel operates independently and can be configured for classic CAN or CAN FD mode via register settings in the CAN control registers.
What package type and pin count does the SPC5748CK0AMKU6 use?
The SPC5748CK0AMKU6 uses a 176-pin LQFP-EP (leadless quad flat package with exposed thermal pad) measuring 24 mm × 24 mm. The exposed pad improves thermal dissipation in automotive environments and must be soldered to a solid ground plane per NXP's layout guidelines in AN5322.
Is the SPC5748CK0AMKU6 ISO 26262 ASIL-B certified, and what safety mechanisms does it include?
Yes, the SPC5748CK0AMKU6 is ISO 26262 ASIL-B certified. It includes hardware safety mechanisms such as end-to-end ECC on all memory and buses, dual SMPUs with 16-region granularity, Fault Collection and Control Unit (FCCU), lockstep-capable peripherals, and built-in self-test (MBIST/LBIST) for memory and logic verification.
What is the role of the Hardware Security Module (HSMv2) in the SPC5748CK0AMKU6?
The HSMv2 in the SPC5748CK0AMKU6 is a dedicated ARM Cortex-M0+ subsystem with cryptographic accelerators (AES-128/256, SHA-256, RSA-2048) and secure key storage. It handles secure boot authentication, encrypted firmware updates, and key provisioning-enabling compliance with UNECE R155 and ISO/SAE 21434 cybersecurity requirements.
SPC5748CK0AMKU6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 176-LQFP Exposed Pad
- Series:
- MPC57xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- e200z2, e200z4
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 80MHz, 160MHz
- Connectivity:
- CANbus, Ethernet, I2C, LINbus, SAI, SPI, USB, USB OTG
- Peripherals:
- DMA, LVD, POR, WDT
- Number of I/O:
- 129
- Program Memory Size:
- 6MB (6M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 768K x 8
- Voltage - Supply (Vcc/Vdd):
- 3.15V ~ 5.5V
- Data Converters:
- A/D 48x10b, 16x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
SPC5748CK0AMKU6 FAQ
1.How can I place an order for SPC5748CK0AMKU6 through Aetrix?
Please submit a Request for Quotation (RFQ) for SPC5748CK0AMKU6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SPC5748CK0AMKU6 reliable?
The price and inventory of SPC5748CK0AMKU6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPC5748CK0AMKU6 is usually 5 days.
3.What payment methods are accepted for SPC5748CK0AMKU6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SPC5748CK0AMKU6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SPC5748CK0AMKU6?
SPC5748CK0AMKU6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SPC5748CK0AMKU6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SPC5748CK0AMKU6?
For technical support, including SPC5748CK0AMKU6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPC5748CK0AMKU6 requirements.
6.How does Aetrix verify that SPC5748CK0AMKU6 is sourced from the original manufacturer or authorized distributors?
All SPC5748CK0AMKU6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPC5748CK0AMKU6 meets industry standards.
7.What is the process for return or replacement of SPC5748CK0AMKU6?
All SPC5748CK0AMKU6 units undergo pre-shipment inspection (PSI). If there is an issue with SPC5748CK0AMKU6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SPC5748CK0AMKU6 part is unused and in its original packaging.
Return procedure for SPC5748CK0AMKU6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SPC5748CK0AMKU6 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

