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NXP Semiconductors SPC5748CSK0AMMJ6
- Part No.:
- SPC5748CSK0AMMJ6
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 256-LBGA
- Datasheet:
-
SPC5748CSK0AMMJ6.pdf
- Description:
- IC MCU 32BIT 6MB FLSH 256MAPPBGA
- Quantity:
- Payment:
- Shipping:
Inventory:4,514
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Product details
Overview
SPC5748CSK0AMMJ6 from NXP Semiconductors is an automotive-qualified 32-bit Power Architecture® microcontroller featuring dual e200Z4 cores (160 MHz), one e200Z2 core (80 MHz), 6 MB on-chip flash, 768 KB SRAM with end-to-end ECC, and integrated FlexCAN FD, Ethernet AVB, and HSMv2 security. It serves as a high-integration gateway controller in vehicle domain controllers requiring ASIL-B functional safety compliance.
For engineers reviewing the SPC5748CSK0AMMJ6 datasheet, SPC5748CSK0AMMJ6 pinout, SPC5748CSK0AMMJ6 application, or SPC5748CSK0AMMJ6 equivalent, this part supports deterministic real-time control, secure boot, multi-protocol communication (CAN FD, LIN, FlexRay, USB OTG/SPH, ENET), and hardware-accelerated cryptography for automotive gateway and body control modules.
Technical Context
The SPC5748CSK0AMMJ6 implements a triple-core heterogeneous architecture: two high-performance e200Z4 CPUs with VLE support, single-precision FPU, and 8 KB instruction / 4 KB data cache, plus one e200Z2 CPU optimized for code density. All cores operate under a unified memory map with SMPU-based memory protection across three RAM ports and six flash banks.
Its clock system integrates FMPLL, 8–40 MHz FXOSC, 32 kHz SXOSC, and 16 MHz FIRC, enabling precise timing for real-time peripherals including 96-channel eMIOS, 16 PITs, and cross-triggered ADCs. The device uses a 256-pin MAPBGA package with dedicated I/O domains for CAN FD, LINFlex, Ethernet, and USB, supporting wake-up from low-power modes via WKPU.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Architecture | Triple-core: dual e200Z4 @ 160 MHz + single e200Z2 @ 80 MHz, all with VLE and SECDED ECC |
| Flash Memory | 6 MB on-chip flash with 3-port controller, EEE emulation, and RWW capability for concurrent read/write |
| RAM | 768 KB SRAM distributed across three ports, fully protected by end-to-end ECC |
| Functional Safety | ISO 26262 ASIL-B certified; includes FCCU fault collection, HSMv2, and dual SMPUs with 16-region granularity |
| Communication Interfaces | 8 FlexCAN FD channels, 18 LINFlexD, 4 DSPI, 6 SPI, 4 I²C, 2 ENET (10/100 + AVB + IEEE 1588), uSDHC, FlexRay, USB OTG/SPH |
| Analog Peripherals | Two ADCs (10-bit with 48 ch, 12-bit with 64 ch), three analog comparators, and Cross Trigger Unit for synchronized sampling |
| Package | 256-pin MAPBGA (MJ), 15 × 15 mm, 0.8 mm pitch, RoHS-compliant, automotive-grade (-40°C to +125°C) |
Pinout & Package
SPC5748CSK0AMMJ6 is housed in a 256-pin MAPBGA (package code MJ) with 0.8 mm pitch, optimized for automotive PCB layouts requiring thermal dissipation and signal integrity across high-speed interfaces (ENET, USB, FlexRay). Pin functions are organized into dedicated I/O domains for CAN FD, LIN, Ethernet, USB, and general-purpose use.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_HV_A / VDD_HV_B / VDD_HV_C | High-voltage IO supply rails | Independent 3.3 V or 5 V supplies for I/O banks; enable mixed-voltage operation across peripheral domains |
| VDD_LV | Core logic supply | 1.2–1.32 V regulated input for e200Z4/Z2 cores; requires external decoupling per FPREG design rules |
| FXOSC_IN / FXOSC_OUT | Main crystal oscillator interface | Supports 8–40 MHz external crystal; feeds FMPLL for system clock generation and jitter-sensitive peripherals |
| CANFD0_TX / CANFD0_RX | FlexCAN FD channel 0 differential pair | High-speed CAN FD transceiver interface compliant with ISO 11898-1:2015; supports up to 5 Mbps data phase |
| ENET0_MDC / ENET0_MDIO | IEEE 802.3 MII management interface | Configures PHY registers via SMI; required for AVB stream reservation and IEEE 1588 timestamp synchronization |
| USB0_DP / USB0_DM | USB OTG differential data pair | Full-speed (12 Mbps) USB 2.0 OTG interface with on-chip PHY; supports host/peripheral mode and battery charging detection |
| WKPU_IN0 | Wake-up controller input | Dedicated low-power wake-up pin with programmable edge sensitivity; enables exit from STOP/STANDBY modes without full reset |
Key Features
| Feature | Design Value |
|---|---|
| HSMv2 Hardware Security Module | Enables secure boot, cryptographic acceleration (AES-128/256, SHA-256, RSA-2048), and key lifecycle management per EVITA Full |
| End-to-End ECC Protection | Covers all bus masters, 64-bit data + 29-bit address paths, and memory subsystems-prevents silent data corruption in safety-critical execution |
| Dual SMPU with 16-Region Granularity | Enforces memory access policies per core and peripheral; prevents unauthorized DMA or interrupt handler access to protected zones |
| FlexCAN FD with Protocol Offload | Hardware message filtering, RAM-based TX/RX buffers, and bit-rate switching reduce CPU load during high-bandwidth CAN traffic bursts |
| Cross-Trigger Unit (CTU) | Synchronizes ADC conversions with eMIOS timer events or PIT interrupts-enables deterministic sensor sampling in motor control loops |
Applications
| Automotive Gateway Controller | Body Control Module (BCM) |
|---|---|
Use Scenario: Centralized communication hub between powertrain, chassis, infotainment, and ADAS ECUs via CAN FD, LIN, and Ethernet. IC Role / Device Role / Timing Role: Real-time protocol translation, message routing, and firewall enforcement using dual SMPUs and HSMv2. Use Value: Enables ASIL-B compliant gateway functionality with deterministic latency (<5 µs inter-CAN routing) and secure OTA update handling. |
Use Scenario: Integrated control of lighting, door locks, window lifts, HVAC actuators, and battery monitoring in premium vehicles. IC Role / Device Role / Timing Role: Multi-domain resource manager coordinating 96 eMIOS channels, 18 LINFlexD, and 3x ADCs for sensor fusion. Use Value: Reduces BOM count by consolidating discrete drivers; supports wake-on-LIN and low-power standby (<10 µA). |
| Domain Controller for Zonal Architecture | Secure Telematics Control Unit (TCU) |
Use Scenario: Aggregation point for multiple vehicle subnets (e.g., front/rear/zonal CAN FD buses) with time-synchronized diagnostics and logging. IC Role / Device Role / Timing Role: Time-aware scheduler using RTC/API and IEEE 1588-capable ENET; manages 2x L2 Ethernet switches for deterministic traffic shaping. Use Value: Delivers sub-microsecond timestamp accuracy across domains and supports AUTOSAR adaptive platform integration. |
Use Scenario: Cellular-connected module handling remote diagnostics, firmware updates, and emergency call (eCall) services with cryptographic signing. IC Role / Device Role / Timing Role: Secure boot loader executing from protected flash; HSMv2 performs ECDSA signature verification before loading application firmware. Use Value: Meets UNECE R155 cybersecurity management system (CSMS) requirements with tamper-resistant key storage and audit logging. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC5748GSK0AMMJ6 | Same die, identical core configuration and peripheral set; differs only in qualification status (S = automotive qualified vs P = engineering sample) | Identical functional scope; used in production releases where AEC-Q100 Grade 1 qualification is mandatory | Select MPC5748GSK0AMMJ6 for volume production requiring full automotive qualification documentation and PPAP support. |
| SPC574SCK0MLQ6 | Lower-flash variant (4 MB), 176-pin LQFP-EP package, no FlexRay or second Ethernet; retains dual e200Z4 + e200Z2 and HSMv2 | Targeted at cost-sensitive body electronics with reduced I/O count and no zonal networking requirements | Choose SPC574SCK0MLQ6 when footprint, thermal budget, or BOM cost constraints preclude 256-BGA and 6 MB flash usage. |
Compared with SPC5748CSK0AMMJ6, MPC5748GSK0AMMJ6 offers identical silicon functionality with formal automotive qualification, while SPC574SCK0MLQ6 trades flash capacity, FlexRay, and dual Ethernet for smaller package size and lower unit cost-making it suitable for non-gateway tier-2 applications.
Availability
SPC5748CSK0AMMJ6 is available at Aetrix Electronics and suitable for automotive gateway systems, domain controllers, and secure telematics units requiring stable component supply, long-term lifecycle support, and AEC-Q100 Grade 1 qualification.
Supply support for SPC5748CSK0AMMJ6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in Power Architecture® and functional safety-certified MCUs.
The SPC5748CSK0AMMJ6 belongs to NXP's SPC57 family of automotive microcontrollers designed specifically for ASIL-B gateway and domain control applications, integrating high-performance compute, multi-protocol communication, and hardware-enforced security in a single die.
FAQ
What is the qualification status and temperature range of SPC5748CSK0AMMJ6?
SPC5748CSK0AMMJ6 is an automotive-qualified part (qualification status 'S') rated for operation from –40°C to +125°C ambient temperature (Grade 1 per AEC-Q100). Its junction temperature limit is 150°C, and it meets ISO 26262 ASIL-B requirements for functional safety-critical applications. This makes SPC5748CSK0AMMJ6 suitable for under-hood and central gateway deployments where thermal robustness is essential.
Does SPC5748CSK0AMMJ6 support CAN FD, and how many channels are available?
Yes, SPC5748CSK0AMMJ6 supports CAN FD across eight FlexCAN modules, each capable of bit-rate switching (up to 5 Mbps data phase) and hardware message filtering. All eight channels implement full CAN FD protocol offload-including CRC calculation, payload length encoding, and automatic retransmission-reducing CPU overhead in high-throughput automotive networks. This capability is confirmed in the MPC5748G datasheet Rev. 6, Section 6.4.1.
What security features does SPC5748CSK0AMMJ6 include for secure boot and firmware updates?
SPC5748CSK0AMMJ6 integrates HSMv2 (Hardware Security Module version 2) supporting secure boot with cryptographic verification of signed firmware images using ECDSA-256 or RSA-2048. It provides dedicated AES-128/256, SHA-256, and TRNG engines, along with tamper-resistant key storage and lifecycle management via PASS/TDM. These features enable SPC5748CSK0AMMJ6 to meet UNECE R155 CSMS requirements for secure OTA updates.
How is memory protection implemented on SPC5748CSK0AMMJ6?
SPC5748CSK0AMMJ6 implements two independent System Memory Protection Units (SMPU_0 and SMPU_1), each with 16 region descriptors and 16-byte granularity. These enforce access permissions (read/write/execute) across flash, SRAM, and peripheral address spaces for each bus master-including e200Z4 cores, eDMA, and debug interfaces. This architecture ensures isolation between safety-critical and non-safety partitions in AUTOSAR OS environments running on SPC5748CSK0AMMJ6.
What Ethernet capabilities does SPC5748CSK0AMMJ6 provide, and are they IEEE 1588-compliant?
SPC5748CSK0AMMJ6 integrates two full-featured ENET complexes supporting 10/100 Mbps operation with MII/RMII interfaces, multi-queue AVB, and IEEE 1588-2008 Precision Time Protocol (PTP) hardware timestamping. Each ENET block includes dedicated timestamp registers, fine-grained delay measurement, and hardware-assisted PTP event message processing-enabling sub-microsecond time synchronization required for time-sensitive networking in zonal architectures using SPC5748CSK0AMMJ6.
SPC5748CSK0AMMJ6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 256-LBGA
- Series:
- MPC57xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- e200z2, e200z4
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 80MHz, 160MHz
- Connectivity:
- CANbus, Ethernet, I2C, LINbus, SAI, SPI, USB, USB OTG
- Peripherals:
- DMA, LVD, POR, WDT
- Number of I/O:
- 178
- Program Memory Size:
- 6MB (6M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 768K x 8
- Voltage - Supply (Vcc/Vdd):
- 3.15V ~ 5.5V
- Data Converters:
- A/D 48x10b, 16x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
SPC5748CSK0AMMJ6 FAQ
1.How can I place an order for SPC5748CSK0AMMJ6 through Aetrix?
Please submit a Request for Quotation (RFQ) for SPC5748CSK0AMMJ6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SPC5748CSK0AMMJ6 reliable?
The price and inventory of SPC5748CSK0AMMJ6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPC5748CSK0AMMJ6 is usually 5 days.
3.What payment methods are accepted for SPC5748CSK0AMMJ6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SPC5748CSK0AMMJ6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SPC5748CSK0AMMJ6?
SPC5748CSK0AMMJ6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SPC5748CSK0AMMJ6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SPC5748CSK0AMMJ6?
For technical support, including SPC5748CSK0AMMJ6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPC5748CSK0AMMJ6 requirements.
6.How does Aetrix verify that SPC5748CSK0AMMJ6 is sourced from the original manufacturer or authorized distributors?
All SPC5748CSK0AMMJ6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPC5748CSK0AMMJ6 meets industry standards.
7.What is the process for return or replacement of SPC5748CSK0AMMJ6?
All SPC5748CSK0AMMJ6 units undergo pre-shipment inspection (PSI). If there is an issue with SPC5748CSK0AMMJ6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SPC5748CSK0AMMJ6 part is unused and in its original packaging.
Return procedure for SPC5748CSK0AMMJ6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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