NXP Semiconductors SPC5748GK1MMJ6R
- Part No.:
- SPC5748GK1MMJ6R
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 256-LBGA
- Datasheet:
-
SPC5748GK1MMJ6R.pdf
- Description:
- IC MCU 32BIT 6MB FLSH 256MAPPBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SPC5748GK1MMJ6R from NXP Semiconductors is an automotive-qualified Power Architecture® microcontroller featuring dual 160 MHz e200Z4 cores and one 80 MHz e200Z2 core, 6 MB on-chip flash with ECC, 768 KB SRAM, and integrated HSMv2 security module. It supports ASIL-B functional safety compliance and delivers deterministic real-time control for vehicle gateway applications requiring CAN FD, FlexRay, Ethernet AVB, and USB OTG.
For engineers reviewing the SPC5748GK1MMJ6R datasheet, SPC5748GK1MMJ6R pinout, SPC5748GK1MMJ6R application, or SPC5748GK1MMJ6R equivalent, this part enables high-integrity communication routing, secure boot, and mixed-signal processing in automotive domain controllers - with attention to clock domain isolation, SMPU region configuration, and FMPLL jitter performance under thermal stress.
Technical Context
The SPC5748GK1MMJ6R implements a triple-core architecture with two high-performance e200Z4 CPUs (160 MHz) supporting single-precision floating-point and VLE encoding, plus one e200Z2 CPU (80 MHz) optimized for deterministic low-latency tasks. All cores share end-to-end ECC protection across bus transactions, covering 64-bit data and 29-bit addresses with SECDED correction.
Its peripheral subsystem includes eight FlexCAN3 modules with CAN FD support, dual-channel FlexRay 2.1, 10/100 Ethernet with IEEE 1588 and AVB, and three Synchronous Audio Interfaces (SAI) with fractional clock dividers - all accessible via multiple crossbar switches enabling concurrent access to flash, RAM, and peripherals without arbitration bottlenecks.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | 2 × e200Z4 @ 160 MHz + 1 × e200Z2 @ 80 MHz; enables parallel real-time task partitioning with hardware debug support per core (Nexus Class 3+) |
| Flash Memory | 6 MB on-chip flash with ECC and 3-port controller; supports RWW operation and BAF programming via LIN/SCI serial link |
| SRAM | 768 KB distributed across three RAM ports with ECC; allows independent access by CPU, DMA, and peripherals without contention |
| Functional Safety | ISO 26262 ASIL-B certified; includes FCCU fault collection, STCU for MBIST/LBIST, and dual SMPUs with 16-region granularity |
| Communication Interfaces | 8 × FlexCAN3 (CAN FD), 2 × FlexRay, 1 × ENET + L2 switch, 4 × DSPI, 6 × SPI, 18 × LINFlexD, 4 × I²C, 2 × USB (OTG + SPH) |
| Analog Subsystem | 10-bit ADC (48 ch) + 12-bit ADC (64 ch), 3 × analog comparators, Cross Trigger Unit for synchronized ADC/timer sampling |
| Security | HSMv2 hardware security module with PASS/TDM lifecycle management; supports secure boot, key provisioning, and cryptographic acceleration |
Pinout & Package
SPC5748GK1MMJ6R is housed in a 256-pin MAPBGA package (package code MJ), measuring 14 mm × 14 mm with 0.8 mm pitch and exposed thermal pad. Pin assignments follow the MPC5748G family pinout defined in Section 9.1 of the Rev. 6 datasheet, supporting configurable I/O domains for FlexCAN, LINFlex, Ethernet, USB, MLB, uSDHC, and general-purpose GPIO.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_HV_A / VDD_HV_B / VDD_HV_C | High-voltage IO supply inputs | Independent 3.3 V or 5 V supplies for I/O banks; enable mixed-voltage interface design with domain-specific voltage scaling |
| VDD_LV | Core logic supply input | 1.2–1.32 V supply for e200Z4/Z2 cores; requires external decoupling per Table 8 (Clp/ulp_reg = 0.8–1.4 µF) |
| FXOSC_IN / FXOSC_OUT | Main crystal oscillator interface | Supports 8–40 MHz external crystal; feeds FMPLL for system clock generation with frequency modulation capability |
| SXOSC_IN / SXOSC_OUT | 32 kHz real-time clock crystal interface | Enables RTC operation during low-power modes; used for wake-up timing and time-stamped event capture |
| JTAG_TCK / JTAG_TMS / JTAG_TDI / JTAG_TDO | Nexus debug interface | IEEE-ISTO 5001-2008 Class 3+ compliant; supports real-time trace, non-intrusive debugging, and secure debug authentication |
| WKPU_IN[0:15] | Wake-up controller inputs | 16 dedicated pins for asynchronous wake-up from STOP/STANDBY modes; configurable edge-triggered detection |
Key Features
| Feature | Design Value |
|---|---|
| End-to-end ECC | SECDED protection applied to all bus masters (cores, DMA, peripherals); ensures data integrity across flash, SRAM, and interconnect paths |
| Triple-port flash controller | Enables simultaneous read, program, and erase operations; eliminates flash access stalls during firmware updates or runtime code patching |
| Configurable I/O domains | Allows independent voltage assignment to FlexCAN, LINFlex, Ethernet, USB, and MLB interfaces - critical for mixed-signal board-level integration |
| Hardware Security Module v2 | Provides AES-128/256, SHA-256, RSA-2048 acceleration and secure key storage; supports secure boot verification and over-the-air update signing |
| System Memory Protection Units | Two SMPUs (SMPU_0/SMPU_1), each with 16 region descriptors and 16-byte granularity; enforces memory access policies between cores and peripherals |
Applications
| Automotive Gateway Controller | ADAS Domain Controller |
|---|---|
Use Scenario: Centralized vehicle network bridge aggregating CAN FD, LIN, FlexRay, and Ethernet traffic between ECU clusters. IC Role / Device Role / Timing Role: Real-time message routing, protocol translation, and secure firmware update distribution using HSMv2 and dual SMPUs. Use Value: Enables deterministic latency (<5 µs interrupt response) and ASIL-B compliance for safety-critical gateway functions with 8 FlexCAN3 channels and dual Ethernet queues. |
Use Scenario: Sensor fusion hub integrating radar, camera, and ultrasonic data streams in Level 2+ ADAS systems. IC Role / Device Role / Timing Role: Time-synchronized acquisition via Cross Trigger Unit linking eMIOS timers to ADC conversions; timestamping via RTC and IEEE 1588. Use Value: Achieves sub-microsecond timestamp alignment across heterogeneous sensor inputs using 96 eMIOS channels and dual 12-bit ADCs with programmable sampling windows. |
| Secure Telematics Control Unit | Electric Powertrain Management |
Use Scenario: Cellular-connected telematics unit performing OTA updates, remote diagnostics, and encrypted V2X messaging. IC Role / Device Role / Timing Role: Secure boot validation, cryptographic offload (AES/SHA/RSA), and isolated execution environments enforced by HSMv2 and SMPUs. Use Value: Meets UNECE R155 cybersecurity management system (CSMS) requirements with tamper-resistant key storage and secure debug disable capability. |
Use Scenario: Inverter control and battery management coordination in 400 V/800 V EV architectures. IC Role / Device Role / Timing Role: High-resolution PWM generation via eMIOS BCTU, current sensing via 12-bit ADC with hardware averaging, and fault monitoring via FCCU. Use Value: Supports 20 kHz motor control loops with <100 ns timer resolution and real-time fault injection response (<1 µs) using dedicated SWT and PIT-RTI resources. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC5748GK1MN6R | 324-pin MAPBGA package (MN), 246 GPIO vs 178 in MJ; larger footprint but higher I/O count and enhanced thermal dissipation | Preferred for designs requiring >178 signals or extended thermal margin in under-hood environments (>105°C ambient) | Select when board layout permits larger BGA and additional GPIO or thermal headroom is required beyond SPC5748GK1MMJ6R's 256-pin constraints. |
| SPC574SADK1MMJ6R | Same 256-pin MAPBGA package but with reduced peripheral set: no FlexRay, no Ethernet, only 4 FlexCAN; lower cost and power envelope | Suitable for body control modules or simpler gateway nodes where full MPC5748G feature set is unused | Choose when CAN FD and LIN connectivity suffice, and FlexRay/Ethernet/USB are unnecessary - reduces BOM cost and software complexity. |
Compared with SPC5748GK1MMJ6R, the MN6R variant offers greater I/O scalability at the expense of PCB area, while the SPC574SADK1MMJ6R provides a cost-optimized path for non-safety-critical or bandwidth-constrained applications - neither is pin-compatible, requiring layout revision and peripheral driver adaptation.
Availability
SPC5748GK1MMJ6R is available at Aetrix Electronics and suitable for automotive gateway systems, ADAS domain controllers, secure telematics units, and electric powertrain management applications requiring stable component supply across long production lifecycles.
Supply support for SPC5748GK1MMJ6R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in functional safety and embedded security.
The SPC5748GK1MMJ6R belongs to NXP's SPC574xG automotive microcontroller family, designed specifically for high-integrity vehicle networking and domain control applications demanding ASIL-B compliance, hardware-accelerated security, and multi-protocol real-time communication.
FAQ
What is the maximum operating temperature range for the SPC5748GK1MMJ6R?
The SPC5748GK1MMJ6R is qualified for operation from –40°C to +125°C ambient temperature (Ta), with junction temperature (Tj) rated up to 150°C. This specification aligns with AEC-Q100 Grade 1 requirements and supports deployment in engine bay and transmission control environments where thermal robustness is critical. The device incorporates thermal monitoring circuits and voltage regulators designed to maintain stability across this full range.
Does the SPC5748GK1MMJ6R support CAN FD, and how many instances are available?
Yes, the SPC5748GK1MMJ6R integrates eight FlexCAN3 modules, all of which support CAN FD protocol with bit rates up to 5 Mbps in the data phase. Each module operates independently with configurable message buffers, acceptance filtering, and error confinement - enabling simultaneous high-bandwidth communication across multiple vehicle domains without software arbitration overhead.
How does the HSMv2 in the SPC5748GK1MMJ6R enhance secure boot functionality?
The Hardware Security Module v2 (HSMv2) in the SPC5748GK1MMJ6R performs cryptographic verification of boot images using SHA-256 hashing and RSA-2048 signature checking before execution. It isolates key storage and crypto operations from the main cores, preventing runtime extraction or modification. This ensures trusted boot chain integrity for SPC5748GK1MMJ6R-based systems complying with ISO/SAE 21434 and UNECE R155.
What clock sources are integrated into the SPC5748GK1MMJ6R?
The SPC5748GK1MMJ6R integrates four internal clock sources: 16 MHz FIRC (Fast IRC), 128 kHz SIRC (Slow IRC), and two external crystal interfaces - FXOSC (8–40 MHz) and SXOSC (32 kHz). These feed the FMPLL for system clock generation, RTC timing, and low-power mode operation. The CMU monitors clock stability and triggers resets upon deviation, ensuring timing reliability for SPC5748GK1MMJ6R real-time applications.
Is the SPC5748GK1MMJ6R pin-compatible with other members of the MPC5748G family?
No, the SPC5748GK1MMJ6R is not universally pin-compatible across the MPC5748G family. While it shares the 256-pin MAPBGA (MJ) package with variants like MPC5748CK1MMJ6R, differences in peripheral enablement, I/O multiplexing, and voltage domain assignments require careful signal mapping review. Pin compatibility must be verified per specific orderable part using NXP's MPC5748G Family Comparison tables and package drawings.
SPC5748GK1MMJ6R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 256-LBGA
- Series:
- MPC57xx
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- e200z2, e200z4, e200z4
- Core Size:
- 32-Bit Tri-Core
- Speed:
- 80MHz/160MHz
- Connectivity:
- CANbus, Ethernet, I2C, LINbus, SAI, SPI, USB, USB OTG
- Peripherals:
- DMA, LVD, POR, WDT
- Number of I/O:
- 178
- Program Memory Size:
- 6MB (6M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 768K x 8
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 5.5V
- Data Converters:
- A/D 80x10b, 64x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
SPC5748GK1MMJ6R FAQ
1.How can I place an order for SPC5748GK1MMJ6R through Aetrix?
Please submit a Request for Quotation (RFQ) for SPC5748GK1MMJ6R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SPC5748GK1MMJ6R reliable?
The price and inventory of SPC5748GK1MMJ6R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPC5748GK1MMJ6R is usually 5 days.
3.What payment methods are accepted for SPC5748GK1MMJ6R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SPC5748GK1MMJ6R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SPC5748GK1MMJ6R?
SPC5748GK1MMJ6R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SPC5748GK1MMJ6R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SPC5748GK1MMJ6R?
For technical support, including SPC5748GK1MMJ6R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPC5748GK1MMJ6R requirements.
6.How does Aetrix verify that SPC5748GK1MMJ6R is sourced from the original manufacturer or authorized distributors?
All SPC5748GK1MMJ6R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPC5748GK1MMJ6R meets industry standards.
7.What is the process for return or replacement of SPC5748GK1MMJ6R?
All SPC5748GK1MMJ6R units undergo pre-shipment inspection (PSI). If there is an issue with SPC5748GK1MMJ6R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SPC5748GK1MMJ6R part is unused and in its original packaging.
Return procedure for SPC5748GK1MMJ6R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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