STMicroelectronics SPEAR600-2

Overview

SPEAR600-2 from STMicroelectronics is a dual-core ARM926EJ-S embedded MPU operating up to 333 MHz, featuring 16 KB instruction + 16 KB data cache per core, integrated 8-channel DMA, 733 DMIPS performance, and programmable TFT/STN LCD controller supporting up to 1024×768 at 24 bpp - deployed in industrial HMI systems requiring real-time display control and networked connectivity.

For engineers reviewing the SPEAR600-2 datasheet, SPEAR600-2 pinout, SPEAR600-2 application, or SPEAR600-2 equivalent, key selection criteria include DDR2-666 memory interface timing compliance, GMAC 10/100/1000 Mbps Ethernet controller integration, dual USB 2.0 host/device support, and reconfigurable 600 Kgate logic array for custom peripheral acceleration.

Technical Context

The SPEAR600-2 implements two tightly coupled ARM926EJ-S cores with independent 16 KB I-cache and D-cache, sharing a unified AHB bus matrix and system controller. Its memory subsystem includes a DDR2-666 controller, Flexible Static Memory Controller (FSMC) with ONFI 1.0 NAND Flash support and configurable ECC, plus serial NOR Flash interface.

Connectivity is delivered via Giga Ethernet (GMII), dual USB 2.0 host ports, one USB 2.0 device port, three SSP interfaces (SPI/Microwire/TI protocol), two UARTs, I²C, fast IrDA, and three I²S audio blocks (1 stereo input + 2 stereo outputs). The integrated LCD controller supports direct and divided clock modes with precise CLCD timing control.

Key Specifications

Pinout & Package

PBGA420 package (23 mm × 23 mm × 2.06 mm, 1.27 mm pitch), thermally enhanced for sustained 333 MHz operation in industrial temperature range (–40 °C to +85 °C).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar embedded MPU applications.

Compared with NXP i.MX27 and TI AM3352, SPEAR600-2 uniquely balances dual-core ARM926EJ-S determinism, native 1024×768 LCD control, and 600 Kgate reconfigurable logic - making it optimal for display-integrated industrial gateways where hardware customization and visual fidelity are critical.

Availability

SPEAR600-2 is available at Aetrix Electronics and suitable for industrial HMI panels, medical diagnostic terminals, networked digital signage, and smart home gateways requiring stable component supply across extended product lifecycles.

Supply support for SPEAR600-2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and automotive-grade processors.

SPEAR600-2 belongs to the SPEAr® family of application-optimized embedded MPUs, engineered specifically for display-rich, network-connected industrial and medical devices requiring long-term availability and hardware flexibility.

FAQ

What is the maximum supported DDR2 speed for SPEAR600-2?

The SPEAR600-2 supports DDR2-666 (333 MHz clock) with a 16-bit data bus. This is confirmed in Section 2.2 of the datasheet (Doc ID 16259 Rev 3), which specifies tCK = 3.0 ns min and full compliance with JEDEC DDR2-667 timing parameters including CAS latency 5 and burst length 8.

Does SPEAR600-2 include on-chip boot ROM and SRAM?

Yes - it integrates 32 KB of mask-programmed BootROM and 8 KB of on-chip SRAM. The BootROM contains the initial boot loader supporting NAND Flash, NOR Flash, and serial interfaces; the SRAM serves as fast-access scratchpad memory for early-boot code and interrupt handlers.

Can the reconfigurable logic array be programmed in-system?

No - the 600 Kgate standard cell array is mask-programmable during wafer fabrication and cannot be reconfigured post-manufacture. It is customized per customer design using ST's RAS (Reconfigurable Array Subsystem) flow, with configuration fixed at production.

What LCD interface standards does the integrated controller support?

The SPEAR600-2 CLCD controller supports both TFT and STN panels with RGB, YUV, and CPU interface modes. It delivers precise timing for resolutions up to 1024×768 at 24 bpp, with programmable pixel clock division and direct clocking - verified in Sections 2.6 and 6.3 of the datasheet.