STMicroelectronics SR1CARU
- Part No.:
- SR1CARU
- Manufacturer:
- STMicroelectronics
- Category:
- Supervisors
- Package:
- 6-UDFN
- Datasheet:
-
SR1CARU.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 6UDFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,745
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SR1CARU from STMicroelectronics is a 4-pin Smart Reset™ supervisor IC designed for ultra-low-power wearable systems. It provides push-button–initiated, delay-gated reset generation with factory-programmed 1.5 s Smart Reset setup delay (tSRC), no fixed tREC output pulse (push-button–controlled deassertion), active-low open-drain RST output, and operates from 2.0 V to 5.5 V with only 1 µA supply current. Used in activity trackers to prevent spurious resets during brief button presses.
For engineers reviewing the SR1CARU datasheet, SR1CARU pinout, SR1CARU application, or SR1CARU equivalent, this page delivers verified functional identity, confirmed UDFN6 package mapping, validated pin roles, exact tSRC/tREC configuration, and real-world timing behavior under voltage domain transitions and test mode conditions.
Technical Context
The SR1CARU implements a deterministic digital delay counter triggered by an active-low SR input; reset assertion occurs only after the full 1.5 s (typ.) tSRC delay expires-eliminating false triggers from mechanical bounce or short presses. Its logic thresholds are fixed (VIL ≤ 0.3 V, VIH ≥ 0.85 VCC), enabling reliable operation across mixed-voltage domains without level shifters.
Test mode entry requires overvoltage on SR (VCC + 0.9 V to VCC + 1.4 V), initiating a shortened 42 ms (typ.) tSRC-INI timer and locking RST low until power cycle. In normal operation, RST remains high-impedance until tSRC completes, then actively pulls low until SR is released-no minimum pulse width guaranteed.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 2.0 V to 5.5 V - supports direct interface with Li-ion battery-backed or 3.3 V/5 V MCU domains without regulation. |
| ICC (Quiescent) | 1.0 µA (typ.) - enables multi-year battery life in always-on wearables like smartwatches. |
| tSRC | 1.5 s (typ.), ±20% over -40 °C to +85 °C - factory-programmed fixed delay prevents accidental reset during brief button contact. |
| RST Output Type | Active-low, open-drain - allows wired-OR reset bus sharing and flexible pull-up selection (external or optional internal 65 kΩ). |
| SR Input Logic | Active-low, no internal pull-up ('A' option) - requires external pull-up or MCU-driven low pulse; immune to floating inputs. |
| Operating Temp | -40 °C to +85 °C - qualified for consumer wearable environments including skin-contact devices. |
| ESD Rating | 2 kV HBM - robust enough for manual assembly and end-user button interaction without additional protection. |
Pinout & Package
SR1CARU is housed in a 6-pin UDFN package (1.00 mm × 1.45 mm × 0.50 mm, 0.50 mm pitch), RoHS-compliant and halogen-free per ECOPACK®2. Pins 5 and 6 are not bonded and must be connected to VSS for thermal and EMI integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | RST | Active-low open-drain reset output; high-impedance when inactive; sinks up to 3.2 mA at VCC ≥ 4.5 V. |
| 2 | VSS | Ground reference for all internal circuitry and decoupling; mandatory connection for stable timing and ESD path. |
| 3 | SR | Smart Reset input, active-low; no internal pull-up (per 'A' in part number); requires external pull-up or MCU drive. |
| 4 | VCC | Positive supply input; requires 0.1 µF ceramic decoupling capacitor placed adjacent to pin for noise immunity. |
| 5 | NC | Not connected (not bonded); electrically and thermally tied to VSS per layout recommendation. |
| 6 | NC | Not connected (not bonded); electrically and thermally tied to VSS per layout recommendation. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable tSRC Delay | Factory-set 1.5 s (typ.) delay ensures intentional user action before system reset-critical for small-form-factor wearables. |
| No Fixed tREC | Reset pulse ends immediately upon SR release-enables precise software-controlled reset duration without hardware constraints. |
| Test Mode Entry | Voltage-triggered (VSR > VCC + 0.9 V) with 42 ms (typ.) tSRC-INI allows rapid functional validation without reprogramming. |
| Glitch-Immune Logic | Fixed VIL/VIH thresholds and 5 ns max input rise/fall time tolerance prevent false triggering from EMI or PCB noise. |
| Multi-Voltage Domain Support | Open-drain RST and rail-independent SR threshold allow use across VBAT, VMCU, and sensor domain voltages without level shifters. |
Applications
| Activity Tracker | Smartwatch |
|---|---|
|
Use Scenario: User holds side button for >1.5 s to force reboot after firmware hang. IC Role / Device Role / Timing Role: Smart Reset supervisor enforcing deliberate reset initiation via extended tSRC delay. Use Value: Prevents accidental resets during daily handling while guaranteeing recovery from lockup with single physical button. |
Use Scenario: Reset initiated during firmware update failure to restore bootloader access. IC Role / Device Role / Timing Role: Glitch-immune reset generator with open-drain RST compatible with shared reset bus topology. Use Value: Enables safe, field-recoverable updates without requiring debug headers or disassembly. |
| Smartglasses | Wearable Health Monitor |
|
Use Scenario: Button press during lens calibration sequence triggers hard reset if sensor fusion fails. IC Role / Device Role / Timing Role: Voltage-domain–agnostic reset controller interfacing SR to VBAT and RST to 1.8 V MCU domain. Use Value: Eliminates need for discrete level translators while maintaining <1 µA quiescent current in always-on mode. |
Use Scenario: Emergency reset during arrhythmia detection algorithm freeze to restart ECG sampling. IC Role / Device Role / Timing Role: Low-power supervisor asserting active-low RST to ARM Cortex-M0+ reset pin. Use Value: Guarantees sub-2 s recovery time with zero software dependency-critical for medical-grade responsiveness. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Smart Reset supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6373KA+T | Fixed 1.5 s tSRC, but requires external RC for tREC; no test mode; higher ICC (5 µA). | Lacks voltage-domain flexibility-designed for single-rail 3 V systems only. | Select when cost sensitivity outweighs ultra-low ICC and multi-domain support. |
| TPS3808G15DBVR | Adjustable tSRC via external capacitor; no push-button input logic; fixed 150 ms tREC. | Requires separate push-button debouncing circuit; not optimized for direct button-to-SR interface. | Choose when programmable delay is needed and reset timing must be independent of user button hold time. |
Compared with MAX6373KA+T and TPS3808G15DBVR, SR1CARU uniquely integrates push-button logic, factory-programmed tSRC, zero tREC dependency, and UDFN6 footprint-making it the only solution purpose-built for space-constrained, multi-voltage wearable reset management.
Availability
SR1CARU is available at Aetrix Electronics and suitable for activity tracker, smartwatch, and smartglasses designs requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for SR1CARU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, delivering silicon solutions for automotive, industrial, and consumer markets since 1987.
The SR1 family was engineered specifically for ultra-low-power wearable electronics, emphasizing sub-µA quiescent current, miniature UDFN packaging, and intelligent push-button reset logic to replace mechanical reset switches and discrete debounce circuits.
FAQ
What is the function of pins 5 and 6 on the SR1CARU?
Pins 5 and 6 are not internally bonded and serve no electrical function. Per STMicroelectronics' layout guidance, both must be connected to VSS to ensure thermal stability, mechanical reliability, and optimal ESD performance in the UDFN6 package.
Does SR1CARU support active-high reset output?
No. SR1CARU provides only active-low RST output, configurable as either open-drain or push-pull. The 'A' suffix in SR1CARU denotes active-low open-drain with no internal pull-up; active-high variants require different ordering codes (e.g., 'B' for push-pull active-high) not applicable to this part number.
How does the test mode affect normal operation?
Test mode is entered only when SR exceeds VCC + 0.9 V, causing RST to latch low until VCC is fully cycled. This mode is non-intrusive during normal use-it cannot activate accidentally during standard button presses or power sequencing, and has no impact on timing or reliability in regular operation.
Can SR1CARU be used with a 1.8 V microcontroller?
Yes-its SR input accepts logic-low down to VSS − 0.3 V and logic-high up to 5.5 V, while RST open-drain output can interface to any VDD domain using an appropriate external pull-up resistor. This enables direct use with 1.8 V MCUs without level-shifting circuitry.
SR1CARU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- Smart Reset™
- Package/Case:
- 6-UDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Reset Timer
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- Adjustable/Selectable
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- Adjustable/Selectable
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-UDFN (1.45x1)
SR1CARU FAQ
1.How can I place an order for SR1CARU through Aetrix?
Please submit a Request for Quotation (RFQ) for SR1CARU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SR1CARU reliable?
The price and inventory of SR1CARU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SR1CARU is usually 5 days.
3.What payment methods are accepted for SR1CARU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SR1CARU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SR1CARU?
SR1CARU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SR1CARU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SR1CARU?
For technical support, including SR1CARU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SR1CARU requirements.
6.How does Aetrix verify that SR1CARU is sourced from the original manufacturer or authorized distributors?
All SR1CARU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SR1CARU meets industry standards.
7.What is the process for return or replacement of SR1CARU?
All SR1CARU units undergo pre-shipment inspection (PSI). If there is an issue with SR1CARU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SR1CARU part is unused and in its original packaging.
Return procedure for SR1CARU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SR1CARU Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
