STMicroelectronics SR1PARU

Overview

SR1PARU from STMicroelectronics is a 4-pin Smart Reset™ supervisor IC designed for ultra-low-power wearable systems. It provides push-button–initiated, delay-validated system reset with factory-programmed 7.5 s Smart Reset setup delay (tSRC), active-low open-drain RST output, and no fixed tREC-enabling software-interrupt–compatible short presses and hard-reset–triggered long presses in activity trackers and smartwatches.

For engineers reviewing the SR1PARU datasheet, SR1PARU pinout, SR1PARU application, or SR1PARU equivalent, this device supports voltage-domain-flexible reset supervision in constrained-space wearables where supply current ≤1 µA, operating range 2 V–5.5 V, and -40 °C to +85 °C ambient stability are critical selection criteria.

Technical Context

The SR1PARU implements a deterministic digital timer architecture that requires the SR input to be held low for ≥7.5 s (typ.) before asserting RST-eliminating spurious resets from accidental button taps. Its logic thresholds (VIL ≤0.3 V, VIH ≥0.85×VCC) and test mode entry at VSR > VCC +1.1 V ensure robust operation across mixed-voltage domains.

It supports two distinct reset behaviors: push-button–controlled pulse width (no tREC) and optional internal pull-up on SR. The RST output remains asserted only while SR is held low, enabling direct MCU interrupt co-use without hardware conflict.

Key Specifications

Pinout & Package

SR1PARU is housed in a 6-pin UDFN package (1.00 mm × 1.45 mm × 0.50 mm height, 0.50 mm pitch). Pins 5 and 6 are not bonded and must be connected to VSS for mechanical stability and thermal performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar reset supervisor applications.

Compared with MAX6369KA+T and TPS3808G125DBVR, SR1PARU uniquely delivers factory-programmed 7.5 s tSRC in a 1.00 mm × 1.45 mm UDFN6 package with true push-button dual-role capability-making it the only viable option for space-constrained, battery-sensitive wearables requiring both interrupt and hard-reset functions on one button.

Availability

SR1PARU is available at Aetrix Electronics and suitable for activity trackers, smartwatches, and smartglasses requiring stable component supply, long-term lifecycle support, and RoHS-compliant ECOPACK®2 packaging.

Supply support for SR1PARU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, delivering silicon solutions for automotive, industrial, and consumer markets with emphasis on energy efficiency and reliability.

SR1PARU belongs to ST's Smart Reset™ supervisor product line, engineered specifically for ultra-low-power wearable electronics where deterministic, user-initiated system recovery must coexist with minimal footprint and battery drain.

FAQ

Does SR1PARU support active-high reset output?

No. SR1PARU is configured exclusively for active-low RST output in open-drain topology. The "A" in its part number denotes active-low SR input and active-low open-drain RST output with no internal pull-up. Active-high variants exist in other SR1 suffixes (e.g., "B" for SR with internal pull-up), but RST polarity remains active-low per datasheet Table 6 and Figure 2.

Can SR1PARU be used with a 1.8 V supply?

No. SR1PARU's absolute minimum VCC is 2.0 V per Table 2 (Maximum Ratings) and Table 3 (Operating Conditions). Operation below 2.0 V risks undefined logic states, failure to assert RST, and potential latch-up. For 1.8 V systems, consider ST's VL-series supervisors or redesign with level-shifting.

Is the 7.5 s tSRC value adjustable after manufacturing?

No. The tSRC delay is factory-programmed during wafer sort and permanently laser-trimmed. SR1PARU does not support runtime adjustment, I²C configuration, or external resistor tuning. The "U" suffix confirms fixed 10.0 s tSRC for SR1UARU, while "P" denotes 7.5 s-both are immutable post-manufacture.

What happens to RST output during VCC power-up?

During VCC ramp-up, RST remains in high-impedance (Hi-Z) state for open-drain variants until VCC exceeds the valid operating range (≥2.0 V) and internal power-on reset completes. This prevents false reset assertion during power sequencing, as confirmed in Section 3.6 and Figure 7 timing diagrams.