My Inquiry
My Account
Texas Instruments SRC4184IPAGR
- Part No.:
- SRC4184IPAGR
- Manufacturer:
- Texas Instruments
- Category:
- Audio Special Purpose
- Package:
- 64-TQFP
- Datasheet:
-
SRC4184IPAGR.pdf
- Description:
- IC SAMPLE RATE CONVERTER 64TQFP
- Quantity:
- Payment:
- Shipping:
Inventory:4,970
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SRC4184IPAGR from Texas Instruments is a four-channel asynchronous sample rate converter (ASRC) designed for professional audio systems. It supports input/output sampling rates up to 212 kHz, delivers 128 dB dynamic range and −125 dB THD+N, and operates across a 16:1 to 1:16 input-to-output sampling ratio. It is used in broadcast studio equipment requiring precise, low-jitter sample rate translation between disparate digital audio domains.
For engineers reviewing the SRC4184IPAGR datasheet, SRC4184IPAGR pinout, SRC4184IPAGR application, or SRC4184IPAGR equivalent, this page provides verified technical context, hardware/software mode operation details, TQFP-64 package layout, and real-world audio system integration guidance - including TDM daisy-chaining, programmable digital attenuation, and de-emphasis filter selection.
Technical Context
The SRC4184IPAGR implements dual independent ASRC engines (Channel A and B), each with configurable interpolation and decimation filters supporting linear-phase response and four group delay options. Its digital filtering architecture enables high-fidelity resampling without audible artifacts across wide fsIN/fsOUT ratios.
It offers dual control modes: Hardware mode uses dedicated pins for format, word length, bypass, mute, and filter configuration; Software mode uses a four-wire SPI interface for full register-level access to status, ratio readback, attenuation, and de-emphasis settings.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | Four independent channels (A/B × 2 paths), enabling dual stereo or quad mono resampling in one device. |
| Sampling Rate Range | Input and output rates up to 212 kHz - supports high-resolution audio workflows including DSD-derived PCM and immersive audio formats. |
| Input/Output Ratio | 16:1 (downsampling) to 1:16 (upsampling) - handles extreme conversions like 192 kHz → 12 kHz or 32 kHz → 48 kHz without external clock synthesis. |
| Dynamic Range | 128 dB (A-weighted, −60 dBFS input) - preserves low-level detail in mastering and post-production environments. |
| THD+N | −125 dB (0 dBFS input, 20 Hz–fs/2) - meets broadcast-grade distortion requirements for critical monitoring paths. |
| Digital Attenuation | 256-step software-controlled attenuation (0 dB to −127.5 dB, 0.5 dB steps) - enables precise level matching across mixed-sample-rate systems. |
| De-emphasis Support | User-selectable for 32 kHz, 44.1 kHz, and 48 kHz - complies with legacy CD and DAT playback standards. |
Pinout & Package
TQFP-64 package with exposed thermal pad (RoHS-compliant, lead-free finish). Pin assignments support dual-channel parallel operation, hardware/software mode selection via H/S pin, and separate reference clocks (RCKIA/RCKIB) per channel.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RCKIA / RCKIB | Reference Clock Input (A/B) | Independent clock inputs per channel; frequency = 128 × min(fsIN, fsOUT); enables true asynchronous operation. |
| SDINA / SDINB | Audio Input Data (A/B) | Serial audio data inputs supporting I²S, left/right-justified, and TDM formats; accepts 16–24-bit words. |
| SDOUTA / SDOUTB | Audio Output Data (A/B) | Resampled output data streams; all output data dithered from internal 28-bit path for optimal SNR preservation. |
| H/S | Control Mode Select | High = Hardware mode (pin-strapped configuration); Low = Software mode (SPI register access enabled). |
| MODEA0–2 / MODEB0–2 | Serial Port Mode Control | In Hardware mode: configure serial port protocol (I²S/TDM), data justification, and master/slave operation. |
| IFMTA0–2 / IFMTB0–2 | Input Format Configuration | In Hardware mode: define input data format, bit depth, and TDM slot assignment per channel. |
| OFMTA0–1 / OFMTB0–1 | Output Format Configuration | In Hardware mode: set output data format, justification, and TDM framing for downstream DACs or processors. |
| RDYA / RDYB | Ready Flag Output | Active-low open-drain flag indicating valid resampled data ready at output ports. |
Key Features
| Feature | Design Value |
|---|---|
| TDM Daisy-Chaining | Up to four SRC4184IPAGR devices can be cascaded in TDM mode - reduces interconnect complexity in multi-channel broadcast routers and mixing consoles. |
| Direct Downsampling Option | Bypasses interpolation filter and applies direct downsampling - cuts group delay by up to 50% for latency-sensitive live sound applications. |
| Four Group Delay Options | Selectable interpolation filter buffer sizes (8/16/32/64 samples) - balances latency vs. stopband rejection based on system timing budget. |
| Soft Mute Function | Zero-crossing mute activation with 24-bit attenuation (−128 dB) - eliminates pop/click during sample rate switching or source handoff. |
| Power Supply Flexibility | Operates from +1.8 V core (REGEN = 0) or +3.3 V core with internal regulator (REGEN = 1); I/O supply supports +1.65 V to +3.6 V - simplifies mixed-voltage board design. |
Applications
| Digital Mixing Consoles | Digital Audio Workstations |
|---|---|
Use Scenario: Integrating multiple digital sources (microphone preamps, effects units, playback engines) operating at different native sample rates into a unified 96 kHz or 192 kHz mix bus. IC Role / Device Role / Timing Role: Asynchronous sample rate conversion engine synchronizing incoming AES3, S/PDIF, or TDM streams to the console's master clock domain. Use Value: Eliminates clock domain conflicts and jitter accumulation while preserving 128 dB dynamic range across all channels. |
Use Scenario: Real-time rendering of virtual instruments and effects plugins that require fixed 44.1 kHz or 48 kHz I/O while host DAW runs at 88.2 kHz or 96 kHz. IC Role / Device Role / Timing Role: Bidirectional ASRC bridging between host audio interface and plugin processing chain. Use Value: Enables zero-latency monitoring with sample-accurate synchronization and no audible artifacts during rate transitions. |
| Broadcast Studio Equipment | Audio Distribution Systems |
Use Scenario: Converting legacy 44.1 kHz program material to 48 kHz broadcast standard for on-air transmission, with embedded de-emphasis restoration. IC Role / Device Role / Timing Role: High-fidelity sample rate translator with selectable 44.1 kHz de-emphasis filter and soft mute for seamless source switching. Use Value: Maintains EBU R68 compliance and prevents audible clicks during automated playlist transitions. |
Use Scenario: Distributing synchronized multichannel audio over Dante or AES67 networks where endpoint devices operate at varying sample rates (e.g., 32 kHz conferencing mics + 48 kHz loudspeaker processors). IC Role / Device Role / Timing Role: Edge-resampling node converting heterogeneous inputs to a common distribution rate before packetization. Use Value: Ensures bit-perfect alignment across endpoints without requiring network-wide sample rate lockstep. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar asynchronous sample rate conversion applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AK4128VN | Two-channel ASRC; max 216 kHz rate; 114 dB DR; no TDM daisy-chain support; SPI-only control. | Limited to dual-channel systems; lacks hardware mode and flexible group delay options. | Choose when board space is constrained and only two channels are needed with simpler control. |
| CS8422-CQZ | Two-channel ASRC; max 212 kHz; 120 dB DR; supports I²S/TDM but no de-emphasis; requires external clock clean-up. | No integrated de-emphasis; lower dynamic range; no direct downsampling option. | Prefer when cost sensitivity outweighs need for broadcast-grade de-emphasis and ultra-low THD+N. |
Compared with AK4128VN and CS8422-CQZ, the SRC4184IPAGR uniquely delivers four-channel operation with hardware/software dual-mode flexibility, TDM daisy-chaining, and selectable group delay - making it the only option qualified for high-density broadcast routing and latency-critical live mixing.
Availability
SRC4184IPAGR is available at Aetrix Electronics and suitable for digital mixing consoles, broadcast studio equipment, and audio distribution systems requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for SRC4184IPAGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-performance signal chain solutions for industrial, automotive, and professional audio markets.
The SRC4184 product line targets professional digital audio infrastructure, delivering precision asynchronous resampling with broadcast-grade dynamic range, ultra-low distortion, and robust multi-format serial interface support.
FAQ
What is the maximum supported input and output sampling rate for the SRC4184IPAGR?
The SRC4184IPAGR supports input and output sampling rates up to 212 kHz, as confirmed in the Electrical Characteristics table under "Input Sampling Frequency, fsIN" and "Output Sampling Frequency, fsOUT". This capability enables compatibility with high-resolution audio formats including 192 kHz PCM and emerging immersive audio standards.
Does the SRC4184IPAGR support both hardware and software configuration modes?
Yes, the SRC4184IPAGR supports dual configuration modes: Hardware mode (H/S pin high) uses dedicated control pins for format, word length, and filter settings; Software mode (H/S pin low) enables full register access via its four-wire SPI interface for dynamic reconfiguration of attenuation, de-emphasis, and ratio readback - both modes are fully supported on the SRC4184IPAGR.
What package type is used for the SRC4184IPAGR, and does it include thermal management features?
The SRC4184IPAGR is housed in a TQFP-64 package with an exposed thermal pad, as shown in the Pin Configuration diagram. This construction enhances thermal dissipation during continuous high-throughput operation - especially important when running dual channels at 192 kHz with active digital filtering and SPI communication.
Can the SRC4184IPAGR perform sample rate conversion between 44.1 kHz and 48 kHz with de-emphasis applied?
Yes, the SRC4184IPAGR supports user-selectable digital de-emphasis for 32 kHz, 44.1 kHz, and 48 kHz sampling rates. When configured for 44.1 kHz input and 48 kHz output (or vice versa), the de-emphasis filter can be enabled to restore frequency response per CD playback standards - verified in the Features list and Electrical Characteristics section.
How many independent channels does the SRC4184IPAGR provide, and are they electrically isolated?
The SRC4184IPAGR provides four independent asynchronous sample rate conversion channels - organized as two dual-path blocks (SRC A and SRC B), each with dedicated reference clocks (RCKIA/RCKIB), serial I/O, and control logic. While not galvanically isolated, channels share power domains but maintain separate data paths, clock domains, and status flags (RDYA/RDYB, RATIOA/RATIOB) to prevent crosstalk.
SRC4184IPAGR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 64-TQFP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Sample Rate Converter
- Applications:
- Digital Audio Interfacing
- Number of Channels:
- 4
- Interface:
- SPI
- Voltage - Supply:
- 1.8V, 3.3V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Specifications:
- 4kHz ~ 212kHz
- Mounting Type:
- Surface Mount
- Grade:
- -
SRC4184IPAGR FAQ
1.How can I place an order for SRC4184IPAGR through Aetrix?
Please submit a Request for Quotation (RFQ) for SRC4184IPAGR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SRC4184IPAGR reliable?
The price and inventory of SRC4184IPAGR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SRC4184IPAGR is usually 5 days.
3.What payment methods are accepted for SRC4184IPAGR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SRC4184IPAGR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SRC4184IPAGR?
SRC4184IPAGR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SRC4184IPAGR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SRC4184IPAGR?
For technical support, including SRC4184IPAGR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SRC4184IPAGR requirements.
6.How does Aetrix verify that SRC4184IPAGR is sourced from the original manufacturer or authorized distributors?
All SRC4184IPAGR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SRC4184IPAGR meets industry standards.
7.What is the process for return or replacement of SRC4184IPAGR?
All SRC4184IPAGR units undergo pre-shipment inspection (PSI). If there is an issue with SRC4184IPAGR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SRC4184IPAGR part is unused and in its original packaging.
Return procedure for SRC4184IPAGR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SRC4184IPAGR Tags
-
SA571DR2G
onsemi
-
ADAU7002ACBZ-R7
Analog Devices Inc.
-
DRV135UA/2K5
Texas Instruments
-
DRV134UA/1K
Texas Instruments
-
DRV134PA
Texas Instruments
-
DRV134UA
Texas Instruments
-
DRV135UA
Texas Instruments
-
SA572DR2G
onsemi
-
PGA2311U/1K
Texas Instruments
-
SI8244BB-D-IS1R
Skyworks Solutions Inc.
-
CS8416K-CZZR
Cirrus Logic Inc.
-
SRC4392IPFBR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
