My Inquiry
My Account
Texas Instruments SRC4382IPFB
- Part No.:
- SRC4382IPFB
- Manufacturer:
- Texas Instruments
- Category:
- Audio Special Purpose
- Package:
- 48-TQFP
- Datasheet:
-
SRC4382IPFB.pdf
- Description:
- IC SAMPLE RATE CONVERTER 48TQFP
- Quantity:
- Payment:
- Shipping:
Inventory:216
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SRC4382IPFB from Texas Instruments is a two-channel asynchronous sample rate converter IC integrating digital audio interface receiver (DIR), transmitter (DIT), dual audio serial ports, and four general-purpose outputs. It supports input/output sampling rates up to 216kHz, delivers 125dB dynamic range and –125dB THD+N, and operates with +1.8V core and +3.3V I/O supplies in professional audio routing and broadcast studio equipment.
For engineers reviewing the SRC4382IPFB datasheet, SRC4382IPFB pinout, SRC4382IPFB application, or SRC4382IPFB equivalent, key selection considerations include its 48-pin TQFP package, SPI/I²C host interface configurability, differential line receiver/transmitter capability, AES3/S/PDIF compatibility, and jitter attenuation performance critical for high-fidelity digital audio interconnects.
Technical Context
The SRC4382IPFB implements a fully asynchronous sample rate conversion architecture with decimation and interpolation filters supporting continuous input-to-output ratios from 1:16 to 16:1. Its DIR block locks to input sampling rates from 20kHz to 216kHz using a PLL with intrinsic recovered clock jitter of 250ps RMS.
The DIT block provides differential TX+/TX– and buffered AESOUT outputs with 200ps RMS intrinsic output jitter, while dual audio serial ports (A/B) support left/right-justified and I²S formats at bit clock frequencies up to 13.824MHz and LRCK up to 216kHz.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Sample Rate Range | 20kHz to 216kHz input and output - enables interoperability between legacy CD (44.1kHz), DVD-Audio (96kHz), and high-res studio (192kHz) systems |
| Dynamic Range | 125dB (A-weighted 128dB typical) - preserves low-level audio detail in professional mixing and mastering applications |
| THD+N | –125dB at full-scale 997Hz - meets broadcast-grade distortion requirements for transparent signal path integrity |
| Input/Output Ratio | 16:1 to 1:16 continuous - supports arbitrary cross-format conversion without resampling artifacts |
| Power Supplies | +1.8V core, +3.3V I/O, +1.65V to +3.6V logic I/O - enables flexible power domain partitioning in mixed-voltage audio SoCs |
| Jitter Performance | 250ps RMS (recovered clock), 200ps RMS (DIT output) - minimizes timing-induced noise in downstream DACs and ADCs |
| Digital Interface | SPI or I²C host control - allows integration with DSPs, microcontrollers, or FPGA-based system controllers |
Pinout & Package
TQFP-48 package with exposed thermal pad; lead-free; compatible with SRC4392 and DIX4192 pinout and register map.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RX1+ / RX1– | Differential line receiver input 1 | Accepts AES3/S/PDIF signals with 200mV differential sensitivity and hysteresis for robust signal recovery |
| RXCKI | DIR reference clock input | Supports 3.5–27.7MHz reference clocks for PLL lock across full sampling rate range |
| RXCKO | Recovered master clock output | Tri-stateable low-jitter clock for synchronous downstream processing blocks |
| TX+ / TX– | DIT differential line driver output | Delivers 5.4Vpp differential output into 110Ω load per AES3 standard |
| AESOUT | DIT buffered AES3-encoded data | CMOS-level output for direct connection to optical transmitters or coaxial drivers |
| MCLK | Master clock input | Accepts 1–27.7MHz clock for internal SRC timing and audio port synchronization |
| CPM / CS / CCLK / CDIN / CDOUT | Configurable host interface | Selects SPI (CPM=0) or I²C (CPM=1); supports 40MHz SPI or 400kHz Fast-mode I²C |
| INT / RST / RDY / LOCK | Status and control signals | Open-drain interrupt, active-low reset, ready flag, and PLL lock indicator for real-time system monitoring |
Key Features
| Feature | Design Value |
|---|---|
| Four-channel differential line receivers | Enables simultaneous monitoring of multiple AES3/S/PDIF sources with automatic non-PCM stream detection (DTS, IEC 61937) |
| Audio CD Q-channel subcode decoding | Extracts track number, index, and timecode metadata directly from CD digital streams for display and navigation |
| Digital de-emphasis filtering | Applies precise 32/44.1/48kHz pre-compensation to correct analog playback EQ curves without external components |
| Block-sized status/user data buffers | Stores channel status and user bits separately from audio payload, enabling real-time metadata inspection and insertion |
| Per-block power-down control | Reduces total power dissipation from 326mW (192kHz) to 1mW (all blocks off), optimizing thermal design in dense audio modules |
| Flexible audio serial ports A/B | Supports independent left/right-justified, I²S, or custom frame formats on each port for multi-DSP interconnection |
Applications
| Broadcast Studio Digital Router | DVD/CD Recorder Audio Processor |
|---|---|
Use Scenario: Routing AES3 feeds between cameras, mixers, and recorders with mismatched sample rates. IC Role / Device Role / Timing Role: Asynchronous SRC bridges 48kHz field recorder output to 44.1kHz archival storage while maintaining jitter-free clock domains. Use Value: Eliminates audible clicks/pops during format switching and preserves 125dB dynamic range across all routing paths. |
Use Scenario: Converting consumer S/PDIF input to internal DSP word clock for real-time Dolby Digital encoding. IC Role / Device Role / Timing Role: DIR receives and validates incoming stream; SRC aligns it to fixed 48kHz DSP clock; DIT retransmits encoded output. Use Value: Enables seamless pass-through of Q-subcode and channel status bits required for compliant DVD authoring. |
| Surround Sound A/V Receiver | Professional Digital Mixing Desk |
Use Scenario: Accepting HDMI audio return channel (ARC) and optical inputs simultaneously for multi-source decoding. IC Role / Device Role / Timing Role: Four differential receivers ingest up to four independent S/PDIF streams; SRC converts each to common 96kHz bus clock. Use Value: Supports concurrent decoding of Dolby Atmos and DTS:X bitstreams without sample rate conflict or buffer underrun. |
Use Scenario: Interfacing legacy 44.1kHz digital tape machines with modern 96kHz DAWs via ADAT or TDIF. IC Role / Device Role / Timing Role: SRC performs bidirectional rate conversion; audio serial ports interface with ADAT optical transceivers. Use Value: Maintains phase coherence and <0.001dB de-emphasis filter error across full 20Hz–20kHz bandwidth during archival transfers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar asynchronous sample rate conversion applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TI SRC4392IPFB | Pin- and register-compatible; adds integrated PLL for MCLK generation and extended 384kHz sampling support | Required when system lacks stable master clock source or needs >216kHz operation | Choose SRC4392IPFB if MCLK generation or ultra-high-res audio (384kHz) is needed; otherwise SRC4382IPFB offers identical functionality at lower cost |
| Cirrus Logic CS8422-CQZ | Single-channel SRC; supports only S/PDIF I/O (no AES3 differential outputs or Q-subcode decode) | Limited to stereo consumer audio interfaces without broadcast metadata handling | Choose CS8422-CQZ only for cost-sensitive stereo consumer gear where differential outputs and subcode are unnecessary |
Compared with SRC4392IPFB and CS8422-CQZ, the SRC4382IPFB uniquely balances professional feature set (AES3 I/O, Q-decode, 4-receiver inputs) with optimized power efficiency (256mW at 48kHz) and TQFP-48 footprint-making it the preferred choice for mid-tier broadcast routers and studio converters requiring full metadata fidelity without over-specification.
Availability
SRC4382IPFB is available at Aetrix Electronics and suitable for digital audio routers, broadcast studio equipment, and DVD/CD recorders requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for industrial audio deployments.
Supply support for SRC4382IPFB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and digital signal technologies for industrial, automotive, and communications markets.
The SRC4382IPFB belongs to TI's high-performance audio interface product line, designed specifically for professional and broadcast digital audio systems requiring robust sample rate conversion, AES3/S/PDIF interoperability, and low-jitter clock recovery.
FAQ
What is the maximum supported sampling rate for SRC4382IPFB input and output?
The SRC4382IPFB supports input and output sampling rates up to 216kHz, with its DIR PLL lock range spanning 20kHz to 216kHz. This enables compatibility with CD (44.1kHz), DVD-Audio (96kHz), SACD (176.4kHz), and high-resolution studio formats (192kHz/216kHz), making the SRC4382IPFB suitable for demanding broadcast and mastering applications where wide-rate flexibility is essential.
Does SRC4382IPFB support both SPI and I²C host interfaces simultaneously?
No, the SRC4382IPFB supports either SPI or I²C mode-not both concurrently. The CPM pin selects the interface: logic low configures SPI (with CS, CCLK, CDIN, CDOUT), and logic high configures I²C (with A0/A1 slave address and SCL/SDA). This single-mode configuration simplifies PCB layout and avoids bus contention, and the SRC4382IPFB retains full register access and buffer control in either mode.
Can SRC4382IPFB decode CD Q-channel subcode data from S/PDIF streams?
Yes, the SRC4382IPFB includes dedicated hardware for audio CD Q-channel subcode decoding and data buffering. It extracts track number, index, absolute time, and control flags directly from the S/PDIF channel status block, enabling real-time display and navigation in DVD/CD recorders and A/V receivers-functionality confirmed in the device's functional description and pin-level specifications for the DIR block.
What are the power supply requirements for SRC4382IPFB operation?
The SRC4382IPFB requires four independent supplies: +1.8V (±0.15V) for the digital core (VDD18), +3.3V (±0.3V) for DIR/DIT analog bias (VDD33), +3.3V (±0.3V) for the DIR comparator/PLL (VCC), and +1.65V to +3.6V for logic I/O (VIO). These separate rails isolate noise-sensitive analog sections and enable interfacing with diverse host processors, ensuring stable SRC4382IPFB operation across industrial temperature ranges (–40°C to +85°C).
Is SRC4382IPFB pin-compatible with other Texas Instruments audio converters?
Yes, the SRC4382IPFB is pin- and register-compatible with the Texas Instruments SRC4392 and DIX4192 devices in the same TQFP-48 package. This allows drop-in replacement in existing designs and simplifies migration paths-for example, upgrading to SRC4392IPFB adds MCLK synthesis capability while retaining identical layout, firmware register maps, and signal routing for the SRC4382IPFB.
SRC4382IPFB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-TQFP
- Packaging:
- Bulk
- Product Status:
- Active
- Function:
- Sample Rate Converter
- Applications:
- Digital Audio Interfacing
- Number of Channels:
- 2
- Interface:
- I2C, SPI
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Specifications:
- 4kHz ~ 216kHz
- Mounting Type:
- Surface Mount
- Grade:
- -
SRC4382IPFB FAQ
1.How can I place an order for SRC4382IPFB through Aetrix?
Please submit a Request for Quotation (RFQ) for SRC4382IPFB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SRC4382IPFB reliable?
The price and inventory of SRC4382IPFB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SRC4382IPFB is usually 5 days.
3.What payment methods are accepted for SRC4382IPFB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SRC4382IPFB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SRC4382IPFB?
SRC4382IPFB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SRC4382IPFB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SRC4382IPFB?
For technical support, including SRC4382IPFB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SRC4382IPFB requirements.
6.How does Aetrix verify that SRC4382IPFB is sourced from the original manufacturer or authorized distributors?
All SRC4382IPFB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SRC4382IPFB meets industry standards.
7.What is the process for return or replacement of SRC4382IPFB?
All SRC4382IPFB units undergo pre-shipment inspection (PSI). If there is an issue with SRC4382IPFB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SRC4382IPFB part is unused and in its original packaging.
Return procedure for SRC4382IPFB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SRC4382IPFB Tags
-
SA571DR2G
onsemi
-
ADAU7002ACBZ-R7
Analog Devices Inc.
-
DRV135UA/2K5
Texas Instruments
-
DRV134UA/1K
Texas Instruments
-
DRV134PA
Texas Instruments
-
DRV134UA
Texas Instruments
-
DRV135UA
Texas Instruments
-
SA572DR2G
onsemi
-
PGA2311U/1K
Texas Instruments
-
SI8244BB-D-IS1R
Skyworks Solutions Inc.
-
CS8416K-CZZR
Cirrus Logic Inc.
-
SRC4392IPFBR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
