STMicroelectronics SRK2001L

Overview

SRK2001L from STMicroelectronics is a secondary-side adaptive synchronous rectification controller optimized for LLC resonant converters with center-tapped secondary windings. It features dual N-channel MOSFET gate drivers, 35 ns total turn-off delay, 50 μA quiescent current in low-consumption mode, and Kelvin drain-source sensing up to 90 V per channel-enabling high-efficiency AC-DC power supplies in 90+/92+ server SMPS.

For engineers reviewing the SRK2001L datasheet, SRK2001L pinout, SRK2001L application, or SRK2001L equivalent, key selection criteria include adaptive turn-on/off timing, programmable sleep-mode entry/exit thresholds, ZCD-based fast turn-off for current inversion protection, and SSOP10 package compatibility with high-density PCB layouts.

Technical Context

The SRK2001L implements asynchronous logic-driven, interlocked dual-state machines for independent control of two SR MOSFETs-preventing simultaneous conduction while synchronizing each gate drive to its respective transformer half-cycle. Its adaptive turn-on masking time (100 ns–2 μs) and two-slope adaptive turn-off algorithm eliminate need for external parasitic inductance compensation circuits.

Operation relies on Kelvin-sensed DVS/SVS pairs (with mandatory 100 Ω series resistors), internal ZCD comparator blanked 450 ns after turn-on, and voltage-clamped gate outputs (9–13 V) that limit gate charge at high VCC. Sleep mode activation is determined by real-time comparison of conduction duty cycle against user-programmed PROG/EN resistor thresholds.

Key Specifications

Pinout & Package

SRK2001L is housed in a 10-pin SSOP package (3.0 mm × 4.9 mm, 1.0 mm pitch) with exposed thermal pad for enhanced thermal dissipation (R_{th j-amb} = 130 °C/W with 25 mm² copper pour). Pin 2 (GND) must be routed to the common source node of both SR MOSFETs to ensure accurate Kelvin sensing.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar secondary-side synchronous rectification applications.

Compared with NCP4306DR2G and SiHP20N60E, SRK2001L uniquely integrates dual-channel adaptive timing, ZCD protection, and programmable sleep mode-making it the sole choice for high-efficiency, high-reliability LLC systems demanding <50 μA no-load draw and sub-100 ns fault response.

Availability

SRK2001L is available at Aetrix Electronics and suitable for AC-DC adapters, high-end flat panel TV power supplies, and 90+/92+ compliant server SMPS requiring stable component supply across extended product lifecycles.

Supply support for SRK2001L includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, analog, and microcontroller technologies for industrial, automotive, and consumer markets.

The SRK2001L belongs to ST's SR controller product line-designed specifically for high-frequency LLC resonant converters requiring adaptive synchronous rectification, ultra-low standby power, and robust fault handling in datacenter and premium consumer power supplies.

FAQ

What is the minimum recommended series resistor for DVS1/DVS2 pins?

A 100 Ω resistor is mandatory in series with each DVS pin to limit dynamic current injection and suppress dV/dt-induced false triggering. This value is specified in ST's DS10811 Rev 7 (page 9) and validated across −40 °C to 125 °C junction temperature range. Lower values risk latch-up; higher values degrade ZCD response time and increase turn-off delay uncertainty.

How does the SRK2001L prevent simultaneous conduction of both SR MOSFETs?

Hardware interlock logic ensures mutual exclusion: when GD1 is active, GD2 is forced low, and vice versa. This is implemented via asynchronous state machines with dedicated arbitration circuitry-not software-based-and is verified under worst-case timing skew (T_j = 125 °C, V_CC = 4.5 V). No external dead-time circuitry is required.

Can the SRK2001L operate with 48 V output LLC converters?

Yes-the DVS pins support up to +90 V drain-to-source sensing, and VCC operates from 4.5 V to 32 V. For 48 V output, VCC must be derived from an auxiliary winding or post-regulator (e.g., LDO from 48 V rail), as direct connection exceeds maximum VCC rating. Kelvin sensing remains valid up to 90 V differential.

What is the impact of PROG pin resistor tolerance on sleep mode behavior?

A 1% tolerance resistor on PROG sets precise conduction duty cycle thresholds per Table 5/6/7 in DS10811. Using 5% resistors introduces ±5% error in entry/exit points-potentially causing premature sleep activation or delayed wake-up during transient loads. ST specifies 1% as mandatory for Titanium/92+ compliance testing.