Microchip Technology SST26VF032B-104I/SM70SVAO
- Part No.:
- SST26VF032B-104I/SM70SVAO
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
SST26VF032B-104I/SM70SVAO.pdf
- Description:
- IC FLASH 32MBIT SPI/QUAD 8SOIJ
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SST26VF032B-104I/SM70SVAO from Microchip Technology is a 32-Mbit Serial Quad I/O™ (SQI™) Flash memory IC operating at 104 MHz (2.7–3.6 V), supporting x1/x2/x4 SPI and full SQI protocols, with 4-Kbyte uniform sectors, 100,000 write/erase cycles, and industrial temperature range (–40°C to +85°C). It serves as nonvolatile code/data storage in microcontroller boot loaders, FPGA configuration, and embedded firmware updates.
For engineers reviewing the SST26VF032B-104I/SM70SVAO datasheet, SST26VF032B-104I/SM70SVAO pinout, SST26VF032B-104I/SM70SVAO application, or SST26VF032B-104I/SM70SVAO equivalent, key selection considerations include its dual-mode SPI/SQI interface, hardware write protection via WP# pin, flexible block-level security lock-down, 2-Kbyte OTP Security ID, and support for burst reads with wrap-around in 8/16/32/64-byte increments.
Technical Context
The SST26VF032B-104I/SM70SVAO implements a six-wire, 4-bit multiplexed I/O interface (SIO[3:0]) enabling SQI mode operation at up to 104 MHz, while retaining full backward compatibility with standard SPI Mode 0/3 commands. Its SuperFlash® split-gate CMOS technology delivers faster erase (18 ms sector, 35 ms chip) and lower active current (15 mA @ 104 MHz) versus conventional NOR Flash.
At power-up, SST26VF032B-104I/SM70SVAO defaults to SPI mode with WP# and HOLD# enabled (IOC = 0), distinguishing it from the SST26VF032BA variant. Memory organization includes eight 8-Kbyte parameter blocks, two 32-Kbyte overlay blocks, sixty-two 64-Kbyte overlay blocks, and uniform 4-Kbyte erasable sectors - all individually protectable via volatile/nonvolatile lock-down registers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 32 Mbit (4 MByte), directly addressable for firmware image storage without external address latching |
| Max Clock Frequency | 104 MHz at 2.7–3.6 V; enables 416 MB/s effective quad-I/O throughput in SQI mode |
| Erase Endurance | 100,000 cycles minimum per sector - supports field firmware updates over product lifetime |
| Data Retention | Greater than 100 years - ensures long-term reliability in unpowered storage applications |
| Operating Voltage | 2.7–3.6 V (standard), or 2.3–3.6 V (low-voltage option); single-supply simplifies power design |
| Temperature Range | Industrial: –40°C to +85°C - qualified for automotive control units and industrial HMIs |
| Security ID | 2-Kbyte OTP area: 64-bit factory-unique ID + user-programmable segment - enables device authentication and secure boot |
Pinout & Package
Package: 8-contact WDFN (6 mm × 5 mm), RoHS-compliant, thermally enhanced for high-density PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CE# | Chip Enable | Active-low chip select; must remain low throughout command sequence to prevent premature termination |
| SIO0/SI | Serial Data Input | Primary data input in SPI mode; multiplexed bidirectional I/O in SQI mode (SIO[3:0]) |
| SIO1/SO | Serial Data Output | Primary data output in SPI mode; multiplexed bidirectional I/O in SQI mode |
| WP#/SIO2 | Write-Protect Input / Quad I/O | Hardware write-protection for Block Protection register when IOC=0 and WPEN=1; reconfigured as SIO2 in SQI mode |
| HOLD#/SIO3 | Hold Input / Quad I/O | Pauses ongoing SPI transfers without resetting clock state; disabled in SQI mode; reconfigured as SIO3 when IOC=1 |
| SCK | Serial Clock | Timing reference; rising edge latches input, falling edge shifts out output - supports Mode 0/3 polarity |
| VDD | Power Supply | 2.7–3.6 V supply; decoupling capacitor required near pin for stable high-speed operation |
| VSS | Ground | Reference return path; must be low-impedance to minimize noise on I/O signals |
Key Features
| Feature | Design Value |
|---|---|
| Quad I/O Interface | Enables 4× data bandwidth vs. standard SPI at same clock frequency - reduces firmware load time by up to 75% |
| Write-Suspend Capability | Allows interruption of erase/program operations to service higher-priority reads - critical for real-time systems |
| Flexible Block Protection | Independent lock-down of 8-Kbyte, 32-Kbyte, and 64-Kbyte blocks via volatile (LBPR) and nonvolatile (nVWLDR) registers |
| OTP Security ID | Factory-programmed 64-bit unique ID + 2-Kbyte user area - supports cryptographic key binding and anti-cloning |
| Low-Power Standby | 15 µA typical standby current - extends battery life in always-on IoT edge nodes |
Applications
| Microcontroller Boot Storage | FPGA Configuration Memory |
|---|---|
Use Scenario: Stores boot code for ARM Cortex-M or RISC-V MCUs requiring fast, reliable startup after power-on reset. IC Role / Device Role / Timing Role: Primary nonvolatile code storage with sequential read optimization and fast random access for vector table fetch. Use Value: 104 MHz SQI read speed enables sub-100 ms boot time; 4-Kbyte sector erase allows incremental firmware patching. | Use Scenario: Holds bitstream for Xilinx Artix-7 or Intel Cyclone V FPGAs during cold start or dynamic reconfiguration. IC Role / Device Role / Timing Role: High-bandwidth serial configuration source interfacing directly to FPGA's dedicated CONFIG_IO pins. Use Value: Continuous linear burst mode delivers >300 MB/s effective throughput - meets FPGA config timing requirements without external buffering. |
| Automotive ECU Firmware | Industrial HMI Display Cache |
Use Scenario: Stores calibrated sensor algorithms and diagnostic routines in AEC-Q100 Grade 2 automotive ECUs. IC Role / Device Role / Timing Role: Secure, endurance-rated firmware repository with hardware write protection against voltage glitch attacks. Use Value: WP# pin + nonvolatile lock-down prevents unauthorized firmware modification; 100,000-cycle endurance supports 15+ years of OTA updates. | Use Scenario: Caches GUI assets (fonts, icons, bitmaps) for ARM-based HMIs in factory automation panels. IC Role / Device Role / Timing Role: Low-latency, high-density local storage supplementing limited internal RAM for rapid UI rendering. Use Value: 64-byte wrap-around burst reads accelerate pixel buffer loading; 8-contact WDFN package saves board space in compact enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Winbond W25Q32JVSIQ | 32 Mbit, 133 MHz max, standard SPI only (no SQI), no OTP Security ID, 100K endurance | Lacks quad I/O acceleration and hardware security features - suitable for cost-sensitive, non-secure designs | Select when SQI bandwidth and device authentication are unnecessary and BOM cost is primary constraint |
| Cypress S25FL132K0XMFI011 | 32 Mbit, 108 MHz max, supports both SPI and QPI modes, includes 64-bit unique ID but no user-programmable Security ID area | Offers QPI compatibility but no nVWLDR or full 2-Kbyte OTP Security ID - less flexible for secure boot implementations | Choose when migrating from legacy Cypress platforms where QPI protocol alignment is required |
Compared with W25Q32JVSIQ and S25FL132K0XMFI011, SST26VF032B-104I/SM70SVAO uniquely combines 104 MHz SQI performance, dual-layer block protection (volatile + nonvolatile), and a full 2-Kbyte programmable Security ID - making it optimal for next-generation secure embedded systems demanding both speed and tamper resistance.
Availability
SST26VF032B-104I/SM70SVAO is available at Aetrix Electronics and suitable for automotive ECUs, industrial HMIs, FPGA configuration, MCU boot storage, and secure IoT edge devices requiring stable component supply across extended product lifecycles.
Supply support for SST26VF032B-104I/SM70SVAO includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and Flash memory solutions, headquartered in Chandler, Arizona, with global manufacturing and support infrastructure.
The SST26VF032B-104I/SM70SVAO belongs to Microchip's Serial Quad I/O™ Flash family, engineered specifically for high-reliability embedded systems requiring fast, secure, and low-power nonvolatile storage - especially where board space, boot speed, and firmware integrity are critical.
FAQ
What is the default I/O configuration of SST26VF032B-104I/SM70SVAO at power-up?
SST26VF032B-104I/SM70SVAO powers up with IOC = 0, enabling WP# and HOLD# pins for SPI mode operation and disabling SIO2/SIO3. This distinguishes it from the SST26VF032BA variant, which defaults to IOC = 1. The Configuration register Bit 1 controls this behavior and can be modified via software if needed.
Does SST26VF032B-104I/SM70SVAO support both SPI and SQI protocols simultaneously?
No - SST26VF032B-104I/SM70SVAO operates in either SPI mode (x1/x2/x4) or SQI mode, selected via the IOC bit and command set. In SPI mode, SI/SO/WP#/HOLD# are active; in SQI mode, SIO[3:0] are used for bidirectional communication. Mode switching requires explicit EQIO or RSTQIO commands.
How does the Security ID feature work in SST26VF032B-104I/SM70SVAO?
SST26VF032B-104I/SM70SVAO includes a 2-Kbyte Security ID area: 64-bit factory-programmed unique identifier (read-only) plus a user-programmable segment. The LSID command permanently locks the entire Security ID space, preventing further writes. Once locked, the SEC bit in the STATUS register remains '1' permanently.
What is the purpose of the nonvolatile Write Lock Lock-Down register (nVWLDR) in SST26VF032B-104I/SM70SVAO?
The nVWLDR in SST26VF032B-104I/SM70SVAO is a 72-bit one-time-programmable register that permanently disables future changes to corresponding block protection bits in the Block Protection Register (BPR). Writing '1' to any nVWLDR bit irreversibly fixes its associated BPR bit to '1', ensuring permanent write protection for that memory block.
Can SST26VF032B-104I/SM70SVAO operate at 104 MHz across its full industrial temperature range?
Yes - SST26VF032B-104I/SM70SVAO is rated for 104 MHz maximum clock frequency at 2.7–3.6 V supply within the industrial temperature range (–40°C to +85°C). At extended temperatures (–40°C to +125°C), the maximum frequency is reduced to 80 MHz per datasheet DS20005218J.
SST26VF032B-104I/SM70SVAO Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH
- Memory Size:
- 32Mbit
- Memory Organization:
- 4M x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 1.5ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIJ
SST26VF032B-104I/SM70SVAO FAQ
1.How can I place an order for SST26VF032B-104I/SM70SVAO through Aetrix?
Please submit a Request for Quotation (RFQ) for SST26VF032B-104I/SM70SVAO on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SST26VF032B-104I/SM70SVAO reliable?
The price and inventory of SST26VF032B-104I/SM70SVAO are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SST26VF032B-104I/SM70SVAO is usually 5 days.
3.What payment methods are accepted for SST26VF032B-104I/SM70SVAO?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SST26VF032B-104I/SM70SVAO transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SST26VF032B-104I/SM70SVAO?
SST26VF032B-104I/SM70SVAO orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SST26VF032B-104I/SM70SVAO order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SST26VF032B-104I/SM70SVAO?
For technical support, including SST26VF032B-104I/SM70SVAO datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SST26VF032B-104I/SM70SVAO requirements.
6.How does Aetrix verify that SST26VF032B-104I/SM70SVAO is sourced from the original manufacturer or authorized distributors?
All SST26VF032B-104I/SM70SVAO products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SST26VF032B-104I/SM70SVAO meets industry standards.
7.What is the process for return or replacement of SST26VF032B-104I/SM70SVAO?
All SST26VF032B-104I/SM70SVAO units undergo pre-shipment inspection (PSI). If there is an issue with SST26VF032B-104I/SM70SVAO, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SST26VF032B-104I/SM70SVAO part is unused and in its original packaging.
Return procedure for SST26VF032B-104I/SM70SVAO:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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