Microchip Technology SST26VF032BA-104I/MF
- Part No.:
- SST26VF032BA-104I/MF
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-WDFN Exposed Pad
- Datasheet:
-
SST26VF032BA-104I/MF.pdf
- Description:
- IC FLASH 32MBIT SPI/QUAD 8WDFN
- Quantity:
- Payment:

- Shipping:

Inventory:332
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SST26VF032BA-104I/MF from Microchip Technology is a 32-Mbit Serial Quad I/O™ (SQI™) Flash memory IC designed for high-speed, low-pin-count embedded storage. It operates at up to 104 MHz (2.7–3.6 V), supports x1/x2/x4 SPI and full SQI protocols, features uniform 4-Kbyte sectors and flexible block protection, and is qualified for industrial temperature range (−40°C to +85°C) in an 8-contact WDFN package.
For engineers reviewing the SST26VF032BA-104I/MF datasheet, SST26VF032BA-104I/MF pinout, SST26VF032BA-104I/MF application, or SST26VF032BA-104I/MF equivalent, key selection considerations include quad-I/O burst read performance, hardware/software write protection granularity, Security ID OTP capability, and default IOC=1 configuration enabling SIO2/SIO3 at power-up - critical for SQI initialization in resource-constrained microcontroller systems.
Technical Context
The SST26VF032BA-104I/MF implements a six-wire SQI interface (SCK, CE#, VDD, VSS, SIO[3:0]) with configurable I/O mode via the IOC bit in its Configuration register - factory-defaulted to '1', disabling WP#/HOLD# and enabling SIO2/SIO3 for immediate Quad I/O operation. It uses SuperFlash® split-gate CMOS technology for enhanced endurance (100,000 cycles) and data retention (>100 years).
It supports dual operational modes: traditional SPI (Mode 0/3, SI/SO) and high-throughput SQI (4-bit multiplexed SIO[3:0]), with command-set compatibility across both. Burst read modes include continuous linear and wrap-around (8/16/32/64-byte), and erase architecture comprises uniform 4-Kbyte sectors plus overlay blocks (8-Kbyte ×8, 32-Kbyte ×2, 64-Kbyte ×62).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 32 Mbit (4 MByte) organized as uniform 4-Kbyte sectors and overlay blocks |
| Max Clock Frequency | 104 MHz at 2.7–3.6 V - enables 416 MB/s theoretical SQI read bandwidth |
| Supply Voltage | 2.3 V–3.6 V - single-supply operation compatible with 2.5 V and 3.3 V system rails |
| Endurance & Retention | 100,000 program/erase cycles minimum; >100 years data retention at 85°C |
| Erase Time | Sector/Block erase: 18 ms typical (25 ms max); chip erase: 35 ms typical (50 ms max) |
| Security ID | 2-Kbyte OTP area: 64-bit factory-unique ID + user-programmable segment, lockable via LSID |
| Temperature Range | Industrial: −40°C to +85°C - validated for extended ambient and junction conditions |
| Package | 8-contact WDFN (6 mm × 5 mm) - low-profile, thermally efficient surface-mount solution |
Pinout & Package
Package: 8-contact WDFN (6 mm × 5 mm), RoHS-compliant, moisture-sensitive level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 CE# | Chip Enable | Active-low chip select; must remain low during entire command sequence including data transfer |
| 2 SO/SIO1 | Serial Data Output / Quad I/O Line 1 | Default SPI output (SO); becomes bidirectional SIO1 in SQI mode after IOC=1 configuration |
| 3 WP#/SIO2 | Write-Protect Input / Quad I/O Line 2 | Disabled at power-up (IOC=1); functions as SIO2 in SQI mode; not used for hardware write-protection |
| 4 VSS | Ground | Reference return path for all digital and I/O circuits; requires low-impedance PCB connection |
| 5 VDD | Power Supply | 2.3–3.6 V supply input; decoupling capacitor (0.1 µF) required near pin |
| 6 HOLD#/SIO3 | Hold Input / Quad I/O Line 3 | Disabled at power-up (IOC=1); functions as SIO3 in SQI mode; inactive in SQI operation |
| 7 SCK | Serial Clock | Timing reference for all serial transfers; supports Mode 0 (CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1) |
| 8 SI/SIO0 | Serial Data Input / Quad I/O Line 0 | Default SPI input (SI); becomes bidirectional SIO0 in SQI mode after IOC=1 configuration |
Key Features
| Feature | Design Value |
|---|---|
| Factory-Configured SQI Mode | IOC bit defaults to '1' at power-up - SIO2/SIO3 enabled, WP#/HOLD# disabled - eliminates boot-time reconfiguration |
| Flexible Block Protection | Software-controlled per-block write-lock (64-Kbyte, 32-Kbyte, 8-Kbyte) with permanent nonvolatile lock-down (nVWLDR) |
| Write-Suspend Capability | Interrupt active Program/Erase to service higher-priority reads from other sectors - essential for real-time firmware updates |
| Security ID with OTP Lock | 2-Kbyte dedicated space: factory-unique 64-bit ID + user area, permanently lockable via LSID command to prevent tampering |
| Burst Read Optimization | Continuous linear and wrap-around burst (8/16/32/64-byte) - reduces instruction overhead and improves sequential access latency |
| SuperFlash® Reliability | Split-gate cell architecture delivers 100K cycles and >100-year retention - exceeds standard NOR Flash in embedded longevity |
Applications
| Boot Code Storage | Firmware Over-the-Air (OTA) |
|---|---|
Use Scenario: Storing primary bootloader and secure boot images in microcontroller-based edge nodes. IC Role / Device Role / Timing Role: Nonvolatile code storage with fast SQI read access and hardware-enforced write protection for immutable boot assets. Use Value: Prevents unauthorized modification of boot code via nVWLDR lock-down and ensures deterministic startup timing using 104 MHz burst reads. | Use Scenario: Receiving and validating encrypted firmware updates in connected industrial gateways. IC Role / Device Role / Timing Role: Dual-bank update staging area with suspend/resume support for atomic firmware swaps without system interruption. Use Value: Write-suspend allows concurrent OTA download and real-time sensor logging; 4-Kbyte sector granularity enables precise delta patching. |
| Secure Device Identity | Parameter Configuration Storage |
Use Scenario: Embedding unique device identity and cryptographic keys in medical IoT sensors. IC Role / Device Role / Timing Role: Tamper-resistant identity vault using OTP Security ID with factory-programmed 64-bit identifier and locked user area. Use Value: LSID command permanently prevents post-deployment key overwrite; 2-Kbyte capacity accommodates ECC keys and certificates. | Use Scenario: Persisting calibrated sensor offsets, network credentials, and user preferences in smart home hubs. IC Role / Device Role / Timing Role: Parameter overlay block storage with individual 8-Kbyte block write-protection and read-lock capability. Use Value: Read-lock on top/bottom 8-Kbyte parameter blocks returns 00H on unauthorized access - enforces data confidentiality without encryption overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Winbond W25Q32JVSSIQ | 32 Mbit SPI-only (no SQI), 133 MHz max, 4-Kbyte sectors, no Security ID OTP | Lacks quad-I/O throughput and hardware-secured identity; suitable only where SQI bandwidth and device ID are not required | Select when cost sensitivity outweighs SQI speed and security needs; verify pinout compatibility (SOIC-8 vs WDFN) |
| Cypress S25FL132K0XMFI010 | 32 Mbit, 104 MHz, supports both SPI and QPI modes, includes 64-bit unique ID but no user-programmable Security ID area | Offers QPI (quad peripheral interface) instead of SQI; lacks nVWLDR and full 2-Kbyte OTP Security ID structure | Choose for QPI-native host controllers; avoid if SQI protocol stack or field-programmable secure ID is mandatory |
Compared with SST26VF032BA-104I/MF, W25Q32JVSSIQ trades SQI bandwidth and OTP security for lower cost and broader SPI ecosystem support, while S25FL132K0XMFI010 provides QPI compatibility but omits user-configurable Security ID lock-down - making SST26VF032BA-104I/MF uniquely suited for secure, high-throughput embedded boot and OTA use cases.
Availability
SST26VF032BA-104I/MF is available at Aetrix Electronics and suitable for industrial control systems, automotive infotainment modules, and medical edge devices requiring stable component supply, long-term lifecycle assurance, and guaranteed RoHS compliance.
Supply support for SST26VF032BA-104I/MF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and Flash memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The SST26VF032BA-104I/MF belongs to Microchip's Serial Quad I/O™ Flash memory product line, engineered specifically for high-reliability embedded systems demanding faster read throughput, robust security features, and simplified board layout via low-pin-count SQI interfaces.
FAQ
What is the default I/O configuration of the SST26VF032BA-104I/MF at power-up?
The SST26VF032BA-104I/MF powers up with the IOC (I/O Configuration) bit set to '1' in its Configuration register. This disables the WP# and HOLD# pins and enables SIO2 and SIO3 for immediate Serial Quad I/O™ operation - distinguishing it from the SST26VF032B variant, which defaults to SPI mode. This configuration eliminates the need for boot-time register writes to activate quad-I/O functionality in the SST26VF032BA-104I/MF.
Does the SST26VF032BA-104I/MF support both SPI and SQI protocols?
Yes, the SST26VF032BA-104I/MF supports full command-set compatibility with traditional SPI (x1/x2 modes) and native Serial Quad I/O™ (SQI) protocol. It operates in SPI mode by default after reset but transitions to SQI mode upon issuing the EQIO command and setting the IOC bit. The SST26VF032BA-104I/MF maintains backward compatibility while delivering up to 4× bandwidth improvement over standard SPI at the same clock frequency.
How does the Security ID feature work in the SST26VF032BA-104I/MF?
The SST26VF032BA-104I/MF includes a 2-Kbyte Security ID (Sec ID) area comprising a factory-programmed 64-bit unique identifier and a user-programmable segment. The PSID command writes to the user area, and the LSID command permanently locks the entire Sec ID space against further writes. Once LSID executes, the SEC bit in the STATUS register becomes '1' and remains so indefinitely - ensuring cryptographic keys or device IDs stored in the SST26VF032BA-104I/MF cannot be altered in the field.
What is the purpose of the nonvolatile Write Lock Lock-Down register (nVWLDR) in the SST26VF032BA-104I/MF?
The nVWLDR in the SST26VF032BA-104I/MF is a 72-bit one-time-programmable register that permanently disables future changes to corresponding block protection bits in the Block Protection Register (BPR). Writing '1' to any nVWLDR bit fixes its associated BPR bit to '1' (protected), preventing erasure or reprogramming of that memory block. This provides irreversible hardware-enforced write protection - a critical requirement for securing boot code or calibration data in safety-critical applications using the SST26VF032BA-104I/MF.
Can the SST26VF032BA-104I/MF be used in automotive applications?
The SST26VF032BA-104I/MF is rated for Industrial temperature range (−40°C to +85°C) and is not AEC-Q100 qualified. While Microchip offers automotive-grade variants (e.g., SST26VF032BA-104I/MF with Grade 2 or Grade 3 suffixes), this specific part number lacks automotive qualification documentation. For automotive use, engineers must verify the exact suffix and consult Microchip's official automotive product matrix - the SST26VF032BA-104I/MF as specified is intended for industrial and commercial embedded systems.
SST26VF032BA-104I/MF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- SST26 SQI®
- Package/Case:
- 8-WDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH
- Memory Size:
- 32Mbit
- Memory Organization:
- 4M x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 1.5ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-WDFN (5x6)
SST26VF032BA-104I/MF FAQ
1.How can I place an order for SST26VF032BA-104I/MF through Aetrix?
Please submit a Request for Quotation (RFQ) for SST26VF032BA-104I/MF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SST26VF032BA-104I/MF reliable?
The price and inventory of SST26VF032BA-104I/MF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SST26VF032BA-104I/MF is usually 5 days.
3.What payment methods are accepted for SST26VF032BA-104I/MF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SST26VF032BA-104I/MF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SST26VF032BA-104I/MF?
SST26VF032BA-104I/MF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SST26VF032BA-104I/MF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SST26VF032BA-104I/MF?
For technical support, including SST26VF032BA-104I/MF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SST26VF032BA-104I/MF requirements.
6.How does Aetrix verify that SST26VF032BA-104I/MF is sourced from the original manufacturer or authorized distributors?
All SST26VF032BA-104I/MF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SST26VF032BA-104I/MF meets industry standards.
7.What is the process for return or replacement of SST26VF032BA-104I/MF?
All SST26VF032BA-104I/MF units undergo pre-shipment inspection (PSI). If there is an issue with SST26VF032BA-104I/MF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SST26VF032BA-104I/MF part is unused and in its original packaging.
Return procedure for SST26VF032BA-104I/MF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SST26VF032BA-104I/MF Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

