Microchip Technology SST26VF040A-104I/SN
- Part No.:
- SST26VF040A-104I/SN
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SST26VF040A-104I/SN.pdf
- Description:
- IC FLASH 4MBIT SPI/QUAD 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,089
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SST26VF040A-104I/SN from Microchip Technology is a 4-Mbit Serial Quad I/O™ (SQI™) Flash memory IC designed for high-speed, low-pin-count embedded storage in space-constrained applications. It operates at 2.7V–3.6V, supports 104 MHz SPI and SQI protocols, features uniform 4-Kbyte sectors and 32/64-Kbyte overlay blocks, and delivers 100,000 program/erase cycles with >100-year data retention. It is used in industrial microcontroller boot code storage where fast linear burst reads and write-suspend capability are required.
For engineers reviewing the SST26VF040A-104I/SN datasheet, SST26VF040A-104I/SN pinout, SST26VF040A-104I/SN application, or SST26VF040A-104I/SN equivalent, key selection considerations include its dual-mode SPI/SQI interface compatibility, 8-lead SOIC package with multiplexed SIO[3:0] pins, industrial temperature range (–40°C to +85°C), hardware write protection via WP# pin, and OTP Security ID support.
Technical Context
The SST26VF040A-104I/SN implements a six-wire, 4-bit multiplexed serial interface supporting both legacy SPI (x1/x2) and high-throughput SQI (x4) modes, with Mode 0 and Mode 3 clock polarity compatibility. Its SuperFlash® technology uses split-gate cells and thick-oxide tunneling for enhanced endurance and faster erase times.
It integrates configurable I/O functionality on shared pins (SIO[3:0]), enabling dynamic switching between SPI and SQI operation via the EQIO command. The device includes dual protection mechanisms-software block protection (BP0–BP3 bits in STATUS register) and hardware write protection controlled by WP# and Configuration register bits (WPEN, IOC)-with factory-default write-protection enabled after power-up.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 4 Mbit (512 Kbytes), organized as uniform 4-Kbyte sectors with 32-Kbyte and 64-Kbyte overlay blocks |
| Max Clock Frequency | 104 MHz (at 2.7V–3.6V, Industrial grade), enabling up to 416 MB/s effective throughput in x4 SQI mode |
| Supply Voltage | 2.7V–3.6V (standard), with full read/write operation supported across this single supply range |
| Endurance & Retention | 100,000 program/erase cycles minimum; data retention exceeding 100 years at 85°C |
| Erase Performance | Sector/Block erase: 20 ms typical; Chip erase: 40 ms typical - reduces firmware update latency |
| Security Feature | 2-Kbyte One-Time-Programmable (OTP) Security ID with factory-programmed 128-bit unique identifier and user-programmable area |
| Operating Temperature | Industrial grade: –40°C to +85°C - qualified for use in industrial control and automotive ECUs |
Pinout & Package
Package: 8-lead SOIC (3.90 mm), RoHS-compliant, surface-mountable with standard reflow profile.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CE# | Chip Enable | Active-low enable signal; must remain low throughout command sequence and data transfer |
| SO/SIO1 | Serial Data Output / Quad I/O 1 | Default SPI output pin; becomes bidirectional SIO1 in SQI mode after EQIO command |
| WP#/SIO2 | Write-Protect Input / Quad I/O 2 | Hardware write-protection control in SPI mode; functions as SIO2 in SQI mode when IOC=1 |
| VSS | Ground | Reference return path for all internal circuitry and I/O signals |
| VDD | Power Supply | 2.7V–3.6V main supply; powers core logic, memory array, and I/O buffers |
| RESET#/HOLD#/SIO3 | Reset/Hold Select / Quad I/O 3 | Configurable pin: RST# when RSTHLD=1; HOLD# when RSTHLD=0; SIO3 in SQI mode when IOC=1 |
| SCK | Serial Clock | Timing reference for all serial transfers; rising edge latches input, falling edge outputs data |
| SI/SIO0 | Serial Data Input / Quad I/O 0 | Default SPI input pin; becomes bidirectional SIO0 in SQI mode after EQIO command |
Key Features
| Feature | Design Value |
|---|---|
| Quad I/O Interface | Enables 4-bit parallel data transfer over same 4 pins (SIO[3:0]), quadrupling bandwidth vs. standard SPI at identical clock frequency |
| Write-Suspend Capability | Allows interruption of active program or erase operations to service higher-priority memory access, then resume without data loss |
| Flexible Erase Architecture | Supports granular 4-Kbyte sector erase plus larger 32-Kbyte and 64-Kbyte overlay blocks - optimizes firmware update efficiency |
| OTP Security ID | Provides tamper-resistant device identity: 128-bit factory-unique ID + 2-Kbyte user-programmable space, lockable via LSID command |
| Hardware Write Protection | WP# pin, combined with WPEN and IOC bits, enables robust, pin-level protection against accidental writes during power transitions |
Applications
| Industrial PLC Firmware Storage | Automotive ECU Boot Memory |
|---|---|
Use Scenario: Storing boot firmware and configuration parameters in programmable logic controllers operating in harsh factory environments. IC Role / Device Role / Timing Role: Nonvolatile boot code storage with fast linear burst reads (up to 104 MHz) and reliable sector erase for field updates. Use Value: 100,000-cycle endurance and >100-year data retention ensure long-term reliability without replacement; industrial temperature rating (–40°C to +85°C) guarantees operation under thermal stress. | Use Scenario: Holding safety-critical boot code and calibration data in engine control units requiring AEC-Q100 qualification. IC Role / Device Role / Timing Role: AEC-Q100-qualified serial Flash providing secure, fast-access storage for ISO 26262-compliant boot sequences. Use Value: Factory-programmed 128-bit Security ID enables cryptographic device authentication; write-suspend allows real-time interrupt handling during firmware updates. |
| Medical Device Parameter Memory | IoT Edge Node Configuration Storage |
Use Scenario: Retaining calibrated sensor offsets and regulatory compliance logs in portable diagnostic equipment with strict power budgets. IC Role / Device Role / Timing Role: Low-power nonvolatile memory supporting standby current of 15 µA and active read current of 15 mA @ 104 MHz. Use Value: Ultra-low standby current extends battery life; 4-Kbyte uniform sectors enable precise, low-overhead parameter updates without erasing unrelated data. | Use Scenario: Storing OTA update images and network credentials in battery-powered wireless sensor nodes deployed in remote locations. IC Role / Device Role / Timing Role: High-reliability Flash with burst-mode reads and software-controlled block protection for secure, incremental firmware patching. Use Value: Block protection bits (BP0–BP2) allow locking critical bootloader region while permitting user-application updates; 256-byte page programming minimizes write latency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial Flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Winbond W25Q40EW | 4-Mbit SPI-only (no SQI), 104 MHz max, 1.65V–1.95V/2.7V–3.6V dual-voltage support | Lacks SQI interface and write-suspend; supports lower VDD min but no OTP Security ID | Select when SQI bandwidth is unnecessary and dual-voltage operation is required |
| Cypress S25FL004K | 4-Mbit Quad SPI (QSPI), 85 MHz max, 2.7V–3.6V, supports XIP and deep power-down | No OTP Security ID; different command set; lacks write-suspend and 64-Kbyte block erase | Select when execute-in-place (XIP) capability is needed and 104 MHz speed is not mandatory |
Compared with Winbond W25Q40EW and Cypress S25FL004K, the SST26VF040A-104I/SN uniquely combines 104 MHz SQI throughput, write-suspend, OTP Security ID, and uniform 4/32/64-Kbyte erase blocks - making it optimal for high-integrity, update-intensive embedded systems where interface flexibility and security are design-critical.
Availability
SST26VF040A-104I/SN is available at Aetrix Electronics and suitable for industrial control systems, automotive electronic control units, and medical diagnostics equipment requiring stable component supply, long-lifecycle support, and AEC-Q100-qualified Flash memory.
Supply support for SST26VF040A-104I/SN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontrollers, analog components, and Flash memory solutions, serving industrial, automotive, and communications markets with vertically integrated silicon and software platforms.
The SST26VF040A-104I/SN belongs to Microchip's Serial Quad I/O™ (SQI™) Flash family, engineered to replace parallel NOR Flash in space-constrained designs while delivering higher bandwidth, lower power, and enhanced reliability through SuperFlash® technology.
FAQ
What interface protocols does the SST26VF040A-104I/SN support?
The SST26VF040A-104I/SN supports both traditional SPI (x1/x2 modes) and high-speed Serial Quad I/O™ (SQI™) protocol (x4 mode). It defaults to SPI mode after power-on reset and enters SQI mode upon receiving the EQIO command. Both Mode 0 and Mode 3 clock polarity are supported, ensuring compatibility with diverse host controllers. This dual-protocol capability makes the SST26VF040A-104I/SN adaptable across legacy and next-generation designs without hardware changes.
Does the SST26VF040A-104I/SN include hardware write protection?
Yes, the SST26VF040A-104I/SN provides hardware write protection via the WP# pin, which works in conjunction with the WPEN and IOC bits in the Configuration register. When WPEN = 1 and IOC = 0, driving WP# low disables writes to the Block Protection Lock (BPL) bit and STATUS register. The factory default sets WPEN = 0, disabling WP# functionality at power-up until explicitly enabled. This ensures safe deployment in systems where the WP# pin may be grounded.
What is the purpose of the Security ID feature in the SST26VF040A-104I/SN?
The SST26VF040A-104I/SN includes a 2-Kbyte One-Time-Programmable (OTP) Security ID with a factory-programmed 128-bit unique identifier and a user-programmable area. This feature enables device authentication, secure firmware binding, and anti-cloning measures. The Security ID can be locked permanently using the LSID command, after which no further writes are possible. The SST26VF040A-104I/SN's SEC bit in the Configuration register reflects lock status, providing runtime verification.
How does write-suspend functionality work in the SST26VF040A-104I/SN?
The SST26VF040A-104I/SN supports write-suspend for both program and erase operations via the WRSU command. When issued, it pauses the ongoing operation, allowing immediate access to other memory regions. The suspended operation resumes upon receipt of WRRE. Status bits WSP and WSE in the Configuration register indicate suspension state. This capability is essential in real-time systems where deterministic latency for critical reads must be guaranteed - a key advantage of the SST26VF040A-104I/SN over basic SPI Flash devices.
Is the SST26VF040A-104I/SN qualified for automotive applications?
Yes, the SST26VF040A-104I/SN is AEC-Q100 qualified for automotive applications. It meets Grade 3 requirements (–40°C to +85°C) and is rated for extended temperature operation up to +125°C. Its SuperFlash® technology ensures 100,000 program/erase cycles and >100-year data retention - critical for automotive ECU boot memory where field reliability and long service life are mandatory. The SST26VF040A-104I/SN's hardware write protection and OTP Security ID further support functional safety requirements in ASIL-B/C systems.
SST26VF040A-104I/SN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- SST26 SQI®
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH
- Memory Size:
- 4Mbit
- Memory Organization:
- 512K x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 1.5ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
SST26VF040A-104I/SN FAQ
1.How can I place an order for SST26VF040A-104I/SN through Aetrix?
Please submit a Request for Quotation (RFQ) for SST26VF040A-104I/SN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SST26VF040A-104I/SN reliable?
The price and inventory of SST26VF040A-104I/SN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SST26VF040A-104I/SN is usually 5 days.
3.What payment methods are accepted for SST26VF040A-104I/SN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SST26VF040A-104I/SN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SST26VF040A-104I/SN?
SST26VF040A-104I/SN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SST26VF040A-104I/SN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SST26VF040A-104I/SN?
For technical support, including SST26VF040A-104I/SN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SST26VF040A-104I/SN requirements.
6.How does Aetrix verify that SST26VF040A-104I/SN is sourced from the original manufacturer or authorized distributors?
All SST26VF040A-104I/SN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SST26VF040A-104I/SN meets industry standards.
7.What is the process for return or replacement of SST26VF040A-104I/SN?
All SST26VF040A-104I/SN units undergo pre-shipment inspection (PSI). If there is an issue with SST26VF040A-104I/SN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SST26VF040A-104I/SN part is unused and in its original packaging.
Return procedure for SST26VF040A-104I/SN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SST26VF040A-104I/SN Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
