Microchip Technology SST26VF040AT-104I/SN
- Part No.:
- SST26VF040AT-104I/SN
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SST26VF040AT-104I/SN.pdf
- Description:
- IC FLASH 4MBIT SPI/QUAD 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SST26VF040AT-104I/SN from Microchip Technology is a 4-Mbit Serial Quad I/O™ (SQI™) Flash memory IC designed for high-speed, low-pin-count embedded storage in space-constrained applications. It operates at 104 MHz (industrial grade), supports 2.3V–3.6V single-supply operation, features uniform 4-Kbyte sectors and 32/64-Kbyte overlay blocks, and delivers 100,000 program/erase cycles with >100-year data retention. It is used in firmware storage for microcontroller boot code in industrial control systems.
For engineers reviewing the SST26VF040AT-104I/SN datasheet, SST26VF040AT-104I/SN pinout, SST26VF040AT-104I/SN application, or SST26VF040AT-104I/SN equivalent, key selection considerations include SQI vs. SPI protocol support, 8-lead SOIC package compatibility, write-suspend capability, Security ID OTP area, and AEC-Q100 qualification for extended temperature operation.
Technical Context
The SST26VF040AT-104I/SN implements a six-wire, 4-bit multiplexed serial interface supporting both legacy SPI (x1/x2) and high-throughput SQI (x4) protocols with Mode 0 and Mode 3 clock polarity compatibility. Its SuperFlash® split-gate CMOS technology enables fast erase (20 ms sector, 40 ms chip) and low active current (15 mA @ 104 MHz).
It integrates dual protection schemes: software-controlled block protection via STATUS register BP0–BP2 bits and hardware write-protection using the WP# pin with configurable WPEN/IOC bits. The device also includes a 2-Kbyte Security ID with factory-programmed 128-bit unique identifier and user-programmable area, locked via LSID command.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 4 Mbit (512 Kbytes), organized as uniform 4-Kbyte sectors |
| Max Clock Frequency | 104 MHz (industrial temp range, 2.7V–3.6V supply) |
| Erase Performance | 20 ms typical sector erase; 40 ms typical chip erase |
| Endurance & Retention | 100,000 program/erase cycles; >100 years data retention |
| Supply Voltage | 2.3V–3.6V single supply - enables direct interfacing with 2.5V/3.3V logic |
| Interface Protocol | Supports SPI x1/x2 and SQI x4 modes; backward-compatible with standard SPI commands |
| Temperature Range | Industrial: –40°C to +85°C; Extended: –40°C to +125°C (AEC-Q100 qualified) |
| Security Feature | One-Time-Programmable 2-Kbyte Security ID with factory-unique 128-bit ID and lockable user area |
Pinout & Package
Package: 8-lead SOIC (3.90 mm), RoHS-compliant, surface-mount.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CE# | Chip Enable | Active-low chip select; must remain low during full command sequence including address/data transfer |
| SO/SIO1 | Serial Output / Quad I/O 1 | Default SPI output pin; functions as SIO1 in SQI mode; outputs data on falling SCK edge |
| WP#/SIO2 | Write-Protect Input / Quad I/O 2 | Hardware write-protection control in SPI mode; becomes SIO2 in SQI mode when IOC=1 |
| VSS | Ground | Reference ground for all I/O and core circuitry |
| VDD | Power Supply | 2.3V–3.6V main supply; powers internal logic, memory array, and I/O buffers |
| RESET#/HOLD#/SIO3 | Reset/Hold Select / Quad I/O 3 | Configurable via RSTHLD bit: RESET# (RSTHLD=1) or HOLD# (RSTHLD=0); acts as SIO3 in SQI mode |
| SCK | Serial Clock | Timing reference; commands/addresses latched on rising edge; data shifted out on falling edge |
| SI/SIO0 | Serial Input / Quad I/O 0 | Default SPI input pin; functions as SIO0 in SQI mode; inputs latched on rising SCK edge |
Key Features
| Feature | Design Value |
|---|---|
| Quad I/O Interface | 4-bit multiplexed SIO[3:0] enables 4× throughput vs. standard SPI at same clock frequency |
| Write-Suspend Capability | Interrupt ongoing program/erase to service urgent read requests without data corruption |
| Flexible Erase Granularity | Independent 4-Kbyte sectors, 32-Kbyte and 64-Kbyte overlay blocks enable optimized firmware update partitioning |
| Security ID with OTP Lock | Factory-unique 128-bit ID + 2-Kbyte user area; LSID command permanently prevents further writes |
| Dual Write Protection | Software (STATUS register BP bits) and hardware (WP# pin with WPEN/IOC control) layers prevent accidental firmware overwrite |
| AEC-Q100 Qualified | Validated for automotive-grade reliability across –40°C to +125°C extended temperature range |
Applications
| Industrial PLC Firmware Storage | Automotive ADAS Boot Memory |
|---|---|
Use Scenario: Storing boot firmware and configuration data for programmable logic controllers operating in factory-floor environments with wide thermal swings and EMI exposure. IC Role / Device Role / Timing Role: Nonvolatile boot memory mapped to MCU's XIP or serial load interface; provides deterministic 104 MHz read access during cold-start initialization. Use Value: Uniform 4-Kbyte sectors allow atomic firmware patching; AEC-Q100 qualification ensures reliability under industrial vibration and thermal cycling. | Use Scenario: Holding safety-critical boot code and calibration tables for radar/sensor fusion modules in advanced driver-assistance systems. IC Role / Device Role / Timing Role: Primary serial flash for MCU boot ROM; accessed via SQI x4 mode to meet ASIL-B timing budgets for sub-100ms startup. Use Value: >100-year data retention guarantees calibration integrity over vehicle lifetime; Security ID enables secure boot authentication with factory-unique root key. |
| Medical Diagnostic Device Code Storage | Smart Energy Meter Firmware |
Use Scenario: Hosting application firmware and regulatory-compliant diagnostic algorithms in portable ultrasound and ECG analyzers requiring long-term data integrity. IC Role / Device Role / Timing Role: Firmware storage IC interfaced to ARM Cortex-M7 via QSPI peripheral; leverages burst-read modes for rapid image processing engine loading. Use Value: 100,000-cycle endurance supports field-upgradable diagnostics; write-suspend allows real-time interrupt handling during firmware updates. | Use Scenario: Storing metrology firmware, tariff tables, and secure communication stacks in ANSI C12.22-compliant smart electricity meters deployed in outdoor utility cabinets. IC Role / Device Role / Timing Role: Trusted nonvolatile memory for secure boot and encrypted OTA updates; operates reliably at –40°C to +85°C ambient. Use Value: Dual write protection (software BP bits + hardware WP#) prevents tampering during field servicing; RoHS compliance meets global environmental mandates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Winbond W25Q40EWUXIE | 4-Mbit SPI-only (no SQI), 133 MHz max, 1.65V–1.95V/2.7V–3.6V dual supply | Lacks SQI x4 throughput and Security ID; supports lower voltage but no AEC-Q100 rating | Select when cost-sensitive SPI-only designs require higher clock speed but do not need quad interface or automotive qualification |
| Cypress S25FL004K0XMFI010 | 4-Mbit FL-S family, 85 MHz max, supports octal DTR mode, no Security ID, industrial temp only | Offers faster random read via DTR but no extended temp or OTP security; different command set | Choose for legacy Cypress-based platforms needing pin-compatible upgrade with enhanced read performance, not security or automotive use |
Compared with W25Q40EWUXIE and S25FL004K0XMFI010, the SST26VF040AT-104I/SN uniquely combines SQI x4 throughput, AEC-Q100 qualification, and factory-programmed Security ID - making it optimal for safety-aware, space-constrained, and high-reliability embedded boot applications where protocol flexibility and tamper resistance are mandatory.
Availability
SST26VF040AT-104I/SN is available at Aetrix Electronics and suitable for industrial PLC firmware storage, automotive ADAS boot memory, and medical diagnostic device code storage requiring stable component supply across long product lifecycles.
Supply support for SST26VF040AT-104I/SN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontrollers, analog devices, and Flash memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The SST26VF040AT-104I/SN belongs to Microchip's Serial Quad I/O™ Flash memory product line, engineered specifically for high-reliability, low-pin-count embedded systems demanding fast, secure, and energy-efficient nonvolatile storage in automotive, industrial, and medical applications.
FAQ
What is the maximum operating frequency of the SST26VF040AT-104I/SN and under what conditions?
The SST26VF040AT-104I/SN achieves a maximum clock frequency of 104 MHz when operated within the industrial temperature range (–40°C to +85°C) and supplied with 2.7V–3.6V. At 2.3V–3.6V, the maximum frequency is 80 MHz for both industrial and extended (–40°C to +125°C) temperature grades. This specification applies to both SPI and SQI read operations, with SQI enabling four times the data throughput per clock cycle.
Does the SST26VF040AT-104I/SN support both SPI and SQI protocols, and how is mode switching handled?
Yes, the SST26VF040AT-104I/SN supports both traditional SPI (x1/x2) and Serial Quad I/O™ (SQI x4) protocols. After power-on reset, it defaults to SPI mode. Switching to SQI mode requires issuing the Enable Quad I/O (EQIO, 0x38) command and setting the IOC bit (bit 1) in the Configuration register to '1'. The IOC bit must be set before executing SQI-specific commands like SQOR (0x6B) or SQIOR (0xEB).
What package options are available for the SST26VF040AT-104I/SN, and which one does this part number specify?
The SST26VF040AT-104I/SN is specified in the 8-lead SOIC (3.90 mm) package, as indicated by the "/SN" suffix. An alternative 8-contact WDFN (6 mm × 5 mm) package is available under different part numbers (e.g., SST26VF040AT-104I/VA). Both packages share identical pinout mapping and electrical specifications, but the SOIC variant offers through-hole and reflow compatibility for legacy PCB assembly processes.
How does the Security ID feature work in the SST26VF040AT-104I/SN, and can it be reprogrammed?
The SST26VF040AT-104I/SN includes a 2-Kbyte Security ID (Sec ID) area comprising a factory-programmed 128-bit unique identifier (read-only, unchangeable) and a user-programmable segment. Users program the latter via the PSID command. Once the LSID command is issued, the entire Sec ID space is permanently locked - neither factory nor user portions can be erased or rewritten. The SEC bit in the Configuration register reflects this locked state.
Is the SST26VF040AT-104I/SN qualified for automotive applications, and what does the "I" in the part number signify?
Yes, the SST26VF040AT-104I/SN is AEC-Q100 qualified for automotive applications and rated for the extended temperature range of –40°C to +125°C. The "I" in the part number denotes industrial/extended temperature grade, distinguishing it from commercial-grade variants. This qualification covers stress testing for reliability, thermal cycling, and ESD robustness required in automotive ECUs, ADAS modules, and infotainment systems.
SST26VF040AT-104I/SN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- SST26 SQI®
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH
- Memory Size:
- 4Mbit
- Memory Organization:
- 512K x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 1.5ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
SST26VF040AT-104I/SN FAQ
1.How can I place an order for SST26VF040AT-104I/SN through Aetrix?
Please submit a Request for Quotation (RFQ) for SST26VF040AT-104I/SN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SST26VF040AT-104I/SN reliable?
The price and inventory of SST26VF040AT-104I/SN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SST26VF040AT-104I/SN is usually 5 days.
3.What payment methods are accepted for SST26VF040AT-104I/SN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SST26VF040AT-104I/SN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SST26VF040AT-104I/SN?
SST26VF040AT-104I/SN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SST26VF040AT-104I/SN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SST26VF040AT-104I/SN?
For technical support, including SST26VF040AT-104I/SN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SST26VF040AT-104I/SN requirements.
6.How does Aetrix verify that SST26VF040AT-104I/SN is sourced from the original manufacturer or authorized distributors?
All SST26VF040AT-104I/SN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SST26VF040AT-104I/SN meets industry standards.
7.What is the process for return or replacement of SST26VF040AT-104I/SN?
All SST26VF040AT-104I/SN units undergo pre-shipment inspection (PSI). If there is an issue with SST26VF040AT-104I/SN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SST26VF040AT-104I/SN part is unused and in its original packaging.
Return procedure for SST26VF040AT-104I/SN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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