Microchip Technology SST26VF080AT-104I/MF
- Part No.:
- SST26VF080AT-104I/MF
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-WDFN Exposed Pad
- Datasheet:
-
SST26VF080AT-104I/MF.pdf
- Description:
- IC FLASH 8MBIT SPI/QUAD 8WDFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,758
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SST26VF080AT-104I/MF from Microchip Technology is an 8-Mbit Serial Quad I/O™ (SQI™) Flash memory IC designed for high-speed, low-pin-count embedded storage in space-constrained applications. It operates at 104 MHz (industrial grade), supports 2.7V–3.6V supply, features uniform 4-Kbyte sectors and 32/64-Kbyte overlay blocks, and delivers 100,000 program/erase cycles with >100-year data retention - used in firmware storage for industrial controllers and automotive infotainment boot code.
For engineers reviewing the SST26VF080AT-104I/MF datasheet, SST26VF080AT-104I/MF pinout, SST26VF080AT-104I/MF application, or SST26VF080AT-104I/MF equivalent, key selection considerations include SQI vs. SPI protocol compatibility, 104 MHz read timing under 2.7–3.6 V, hardware write protection via WP# pin, burst wrap-around support, and OTP Security ID implementation for secure boot verification.
Technical Context
The SST26VF080AT-104I/MF implements a six-wire, 4-bit multiplexed I/O interface supporting both legacy SPI (x1/x2) and high-throughput SQI (x4) protocols, with Mode 0 and Mode 3 clock polarity compatibility. Its SuperFlash® split-gate cell architecture enables single-supply operation (2.3–3.6 V) and reduces total energy per erase/program cycle versus conventional NOR Flash.
It integrates dual-mode control logic: after power-on reset, it defaults to SPI mode; SQI mode is enabled via EQIO command (0x38). Pin functions are dynamically reconfigured via the Configuration register's IOC bit - e.g., SIO[3:0] pins serve as SI/SO/WP#/HOLD# in SPI mode but become quad bidirectional I/Os in SQI mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 8 Mbit (1 Mbyte), organized as 256 uniform 4-Kbyte sectors |
| Max Clock Frequency | 104 MHz at 2.7–3.6 V (industrial temp range); enables 416 MB/s effective throughput in x4 SQI mode |
| Supply Voltage | 2.7 V–3.6 V (standard), or 2.3 V–3.6 V (extended voltage range) |
| Endurance & Retention | 100,000 program/erase cycles minimum; >100 years data retention at 85°C |
| Erase Performance | 20 ms typical sector erase (4 Kbyte), 40 ms typical chip erase - critical for fast firmware updates |
| Security Feature | 2-Kbyte OTP Security ID: factory-programmed 128-bit unique ID + user-programmable area, lockable via LSID command |
| Operating Temperature | Industrial grade: –40°C to +85°C - qualified per AEC-Q100 for automotive ECUs |
Pinout & Package
Package: 8-contact WDFN (6 mm × 5 mm), RoHS-compliant, moisture-sensitive level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CE# | Chip Enable | Active-low enable signal; must remain low throughout command sequence and data transfer |
| SIO[0] / SI | Serial Data Input | Default SPI input pin; becomes bidirectional SIO0 in SQI mode after EQIO command |
| SIO[1] / SO | Serial Data Output | Default SPI output pin; becomes bidirectional SIO1 in SQI mode; high-impedance during HOLD# active |
| SIO[2] / WP# | Write-Protect Input | Hardware write-protection control in SPI mode only; functional when IOC = 0 and WPEN = 1 |
| SIO[3] / RESET# / HOLD# | Multi-function Terminal | Configurable as hardware reset (RSTHLD = 1) or hold (RSTHLD = 0); disabled in SQI mode |
| SCK | Serial Clock | Timing reference; rising edge latches input, falling edge shifts out output; supports Mode 0 (SCK low idle) and Mode 3 (SCK high idle) |
| VDD | Power Supply | 2.7–3.6 V main supply; decoupling required per layout guidelines |
| VSS | Ground | Reference return path; requires low-inductance connection to minimize noise coupling |
Key Features
| Feature | Design Value |
|---|---|
| Quad I/O Protocol Support | Enables 4× data bandwidth vs. standard SPI at same clock frequency - reduces interface latency in real-time boot loaders |
| Write-Suspend Capability | Allows interruption of ongoing program/erase to service higher-priority reads - essential for deterministic response in safety-critical systems |
| Flexible Block Protection | Software-configurable BP0–BP3 bits protect upper 1/16 to full array; BPL bit locks settings against accidental overwrite |
| OTP Security ID | Factory-assigned 128-bit identifier + 2-Kbyte user space provides cryptographic root-of-trust foundation for secure firmware authentication |
| Low Active Current | 15 mA typical @ 104 MHz read - enables power-sensitive portable and battery-backed applications |
Applications
| Industrial PLC Firmware Storage | Automotive Infotainment Boot Memory |
|---|---|
Use Scenario: Storing and executing boot firmware and configuration parameters in programmable logic controllers operating in harsh factory environments. IC Role / Device Role / Timing Role: Nonvolatile code storage with fast random-access read capability and robust sector erase for field-upgradable firmware images. Use Value: 104 MHz SQI read speed ensures sub-100 ms boot time; AEC-Q100 qualification and –40°C to +85°C rating guarantee reliability across temperature cycling and EMI exposure. | Use Scenario: Hosting bootloader and OS kernel in head-unit systems requiring secure, tamper-resistant storage for regulatory compliance (e.g., UNECE R155). IC Role / Device Role / Timing Role: Secure boot memory with OTP Security ID enabling cryptographic signature verification prior to execution. Use Value: Factory-programmed 128-bit ID prevents cloning; LSID command permanently locks ID space, meeting ISO/SAE 21434 hardware security requirements. |
| Medical Device Configuration Storage | Edge AI Sensor Node Code Storage |
Use Scenario: Retaining calibrated sensor offsets, device serial numbers, and regulatory audit logs in Class II medical instruments with long shelf life. IC Role / Device Role / Timing Role: High-reliability parameter storage leveraging >100-year data retention and 100K-cycle endurance for recalibration events. Use Value: Uniform 4-Kbyte sectors allow atomic update of calibration tables without erasing operational firmware; low standby current (15 µA) extends battery life in portable diagnostics. | Use Scenario: Storing inference models and firmware in ultra-compact wireless sensor nodes deployed in remote industrial IoT deployments. IC Role / Device Role / Timing Role: Low-pin-count, high-density code storage interfacing directly to ARM Cortex-M7 microcontrollers via SQI bus. Use Value: 6 mm × 5 mm WDFN package saves PCB area; 104 MHz x4 interface delivers sufficient bandwidth for model streaming while minimizing GPIO count and routing complexity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Winbond W25Q80DVSSIG | 8 Mbit SPI-only (no SQI), max 104 MHz, 2.7–3.6 V, same SOIC-8 package option | Lacks quad I/O and Security ID; suitable where protocol simplicity and legacy SPI compatibility are prioritized over bandwidth or security | Select when SQI interface is unused and cost sensitivity outweighs future upgrade path to faster interfaces |
| Cypress S25FL008KAGMFI001 | 8 Mbit, supports both SPI and QPI modes, 133 MHz max, 2.7–3.6 V, 8-WSON package (5 × 6 mm) | Includes QPI (quad peripheral interface) but no OTP Security ID; different command set and status register mapping | Choose for higher clock margin (133 MHz) and QPI ecosystem familiarity, accepting revalidation effort for secure boot logic |
Compared with SST26VF080AT-104I/MF, W25Q80DVSSIG offers lower system integration complexity but sacrifices SQI bandwidth and hardware-based identity; S25FL008KAGMFI001 provides higher speed and QPI flexibility yet lacks factory-programmed unique ID - making SST26VF080AT-104I/MF the only option among the three with integrated AEC-Q100 qualification and OTP Security ID for automotive-grade secure boot.
Availability
SST26VF080AT-104I/MF is available at Aetrix Electronics and suitable for industrial automation controllers, automotive ECU firmware storage, and medical device calibration data retention requiring stable component supply across extended product lifecycles.
Supply support for SST26VF080AT-104I/MF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global provider of microcontroller, analog, FPGA, and memory solutions, emphasizing reliability, longevity, and embedded system integration.
The SST26VF080AT-104I/MF belongs to Microchip's Serial Quad I/O™ Flash family, engineered specifically for high-performance, secure, and space-efficient code and data storage in automotive, industrial, and medical applications demanding AEC-Q100 compliance and long-term data integrity.
FAQ
What is the maximum operating frequency of the SST26VF080AT-104I/MF and under what conditions?
The SST26VF080AT-104I/MF achieves a maximum clock frequency of 104 MHz when operated within the 2.7 V–3.6 V supply range and at industrial temperature (–40°C to +85°C). This rating applies to both high-speed SPI read (0x0B) and SQI read operations. At 2.3 V–3.6 V, the maximum frequency drops to 80 MHz. The "104" in the part number explicitly denotes this 104 MHz industrial-grade speed bin, confirmed in DS20006203B Section 1.0 and Table 5-1.
Does the SST26VF080AT-104I/MF support both SPI and SQI protocols, and how is mode switching handled?
Yes, the SST26VF080AT-104I/MF supports both traditional SPI (x1/x2) and Serial Quad I/O™ (x4) protocols. It powers up in SPI mode by default. To enter SQI mode, the host must issue the Enable Quad I/O (EQIO) command (0x38) and set the IOC bit (bit 1) in the Configuration register. Once configured, SIO[3:0] pins operate as bidirectional quad I/O lines. Mode switching is software-controlled and non-volatile only if the Configuration register is written; otherwise, reset returns it to SPI mode.
What packaging options are available for the SST26VF080AT-104I/MF, and which one does the "/MF" suffix indicate?
The SST26VF080AT-104I/MF is offered in two packages: 8-lead SOIC (3.90 mm width) and 8-contact WDFN (6 mm × 5 mm). The "/MF" suffix specifically denotes the 8-contact WDFN package, as documented in Microchip's ordering information guide and DS20006203B page 1. This compact, leadless package supports automated optical inspection and provides superior thermal performance for high-density PCB layouts.
How is hardware write protection implemented on the SST26VF080AT-104I/MF, and what pins are involved?
Hardware write protection on the SST26VF080AT-104I/MF is implemented using the WP# pin (SIO[2]) in conjunction with the WPEN bit (bit 7) in the Configuration register. Protection is active only in SPI mode (IOC = 0) and requires WP# driven low *and* WPEN = 1. When enabled, it prevents writes to the Block Protection Lock (BPL) bit and STATUS register BP bits - not full memory write blocking. The factory default has WPEN = 0, so WP# is disabled until explicitly enabled via Configuration register write.
Is the SST26VF080AT-104I/MF AEC-Q100 qualified, and what grade does the "I" suffix represent?
Yes, the SST26VF080AT-104I/MF is AEC-Q100 qualified. The "I" in the part number designates Industrial temperature grade (–40°C to +85°C), which is the grade covered under AEC-Q100 stress testing for automotive applications. Microchip explicitly states AEC-Q100 qualification for the SST26VF080A family in DS20006203B page 1, confirming its suitability for automotive infotainment, body control modules, and ADAS subsystems requiring certified reliability.
SST26VF080AT-104I/MF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- SST26 SQI®
- Package/Case:
- 8-WDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH
- Memory Size:
- 8Mbit
- Memory Organization:
- 1M x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 1.5ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-WDFN (5x6)
SST26VF080AT-104I/MF FAQ
1.How can I place an order for SST26VF080AT-104I/MF through Aetrix?
Please submit a Request for Quotation (RFQ) for SST26VF080AT-104I/MF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SST26VF080AT-104I/MF reliable?
The price and inventory of SST26VF080AT-104I/MF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SST26VF080AT-104I/MF is usually 5 days.
3.What payment methods are accepted for SST26VF080AT-104I/MF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SST26VF080AT-104I/MF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SST26VF080AT-104I/MF?
SST26VF080AT-104I/MF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SST26VF080AT-104I/MF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SST26VF080AT-104I/MF?
For technical support, including SST26VF080AT-104I/MF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SST26VF080AT-104I/MF requirements.
6.How does Aetrix verify that SST26VF080AT-104I/MF is sourced from the original manufacturer or authorized distributors?
All SST26VF080AT-104I/MF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SST26VF080AT-104I/MF meets industry standards.
7.What is the process for return or replacement of SST26VF080AT-104I/MF?
All SST26VF080AT-104I/MF units undergo pre-shipment inspection (PSI). If there is an issue with SST26VF080AT-104I/MF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SST26VF080AT-104I/MF part is unused and in its original packaging.
Return procedure for SST26VF080AT-104I/MF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SST26VF080AT-104I/MF Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

