Microchip Technology SST26VF080AT-104I/SN
- Part No.:
- SST26VF080AT-104I/SN
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SST26VF080AT-104I/SN.pdf
- Description:
- IC FLASH 8MBIT SPI/QUAD 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SST26VF080AT-104I/SN from Microchip Technology is an 8-Mbit Serial Quad I/O™ (SQI™) Flash memory IC designed for high-speed, low-pin-count embedded storage in microcontroller-based systems. It operates at 104 MHz (2.7–3.6 V), supports x1/x2/x4 SPI and SQI protocols, features uniform 4-Kbyte sectors and 32/64-Kbyte overlay blocks, and delivers 100,000 program/erase cycles with >100-year data retention.
For engineers reviewing the SST26VF080AT-104I/SN datasheet, SST26VF080AT-104I/SN pinout, SST26VF080AT-104I/SN application, or SST26VF080AT-104I/SN equivalent, key selection criteria include quad-I/O throughput, industrial temperature support (−40°C to +85°C), hardware/software write protection, Security ID programmability, and WDFN-8 package compatibility with space-constrained PCB layouts.
Technical Context
The SST26VF080AT-104I/SN implements a six-wire, 4-bit multiplexed serial interface (SIO[3:0]) supporting both legacy SPI (Mode 0/3, x1/x2) and high-throughput SQI protocol - enabling up to 4× bandwidth vs. standard SPI at identical clock frequency. Its SuperFlash® split-gate CMOS technology enables single-supply operation (2.3–3.6 V), fast erase (20 ms sector, 40 ms chip), and low active current (15 mA @ 104 MHz).
Internal architecture includes a dedicated page buffer, configurable STATUS and Configuration registers (with IOC, WPEN, RSTHLD bits), hardware HOLD#/RESET#/WP# pin multiplexing, and OTP 2-Kbyte Security ID with factory-programmed 128-bit unique ID. Write-suspend capability allows interleaved access during active program/erase operations.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 8 Mbit (1 Mbyte) organized as uniform 4-Kbyte sectors, plus 32-Kbyte and 64-Kbyte overlay blocks |
| Max Clock Frequency | 104 MHz @ 2.7–3.6 V (industrial grade); supports burst reads with wrap-around (8/16/32/64-byte) |
| Interface Protocols | Full SPI (x1/x2) and SQI (x4) command-set compatibility; Mode 0 and Mode 3 clock polarity support |
| Endurance & Retention | 100,000 program/erase cycles minimum; >100 years data retention at 85°C |
| Power Supply | Single 2.3–3.6 V supply; 15 mA typical active read current @ 104 MHz; 15 µA typical standby current |
| Operating Temperature | Industrial range: −40°C to +85°C; AEC-Q100 qualified for automotive applications |
| Security Features | One-Time-Programmable 2-Kbyte Security ID with 128-bit factory-unique ID and user-programmable area |
Pinout & Package
Package: 8-contact WDFN (6 mm × 5 mm), RoHS-compliant, moisture-sensitive level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CE# | Chip Enable | Active-low enable for all serial commands; must remain low throughout command/data sequence |
| SIO[3:0] / SI/SO / SCK | Multiplexed Serial I/O | In SPI mode: SI (input), SO (output), SCK (clock); in SQI mode: bidirectional SIO[3:0] for command/address/data transfer |
| WP# / SIO2 | Hardware Write Protect | Enables lock-down of STATUS register BP bits when WPEN=1 and IOC=0; disabled in SQI mode |
| HOLD# / RESET# / SIO3 | Hold or Reset Control | Configurable via RSTHLD bit: HOLD# pauses SPI transfers; RESET# performs hardware reset (SPI x1/x2 only) |
| VDD | Power Supply | 2.3–3.6 V main supply; decoupling required per layout guidelines |
| VSS | Ground | Reference ground for all I/O and internal circuitry |
Key Features
| Feature | Design Value |
|---|---|
| Quad I/O Interface | 4-bit multiplexed SIO[3:0] enables 4× throughput vs. standard SPI at same clock rate, reducing bus congestion in MCU-hosted systems |
| Flexible Erase Architecture | Uniform 4-Kbyte sectors + 32-Kbyte and 64-Kbyte overlay blocks allow granular firmware updates without full-chip erase |
| Write-Suspend Capability | Pause active program/erase to service urgent read requests-critical for real-time boot loaders and OTA update handlers |
| Security ID with OTP | Factory-programmed 128-bit unique ID + 2-Kbyte user-programmable area supports device authentication and secure firmware binding |
| Hardware + Software Protection | WP# pin + STATUS register BP bits + LDPS command provide layered, field-configurable write lock for critical firmware partitions |
Applications
| Industrial PLC Firmware Storage | Automotive ADAS Boot Memory |
|---|---|
Use Scenario: Storing and updating firmware images for programmable logic controllers operating in harsh industrial environments. IC Role / Device Role / Timing Role: Non-volatile code storage with fast random-access read and sector-erase granularity for partial firmware patches. Use Value: 104 MHz SQI read speed reduces boot time; AEC-Q100 qualification and −40°C to +85°C rating ensure reliability in factory-floor deployments. | Use Scenario: Holding boot code and safety-critical calibration data for camera/radar modules in advanced driver-assistance systems. IC Role / Device Role / Timing Role: Secure, high-reliability boot memory with OTP Security ID for anti-cloning and firmware integrity verification. Use Value: Factory-programmed 128-bit ID enables cryptographic binding; 100,000-cycle endurance supports frequent over-the-air calibration updates. |
| Medical IoT Sensor Node Storage | Consumer Smart Home Hub Firmware |
Use Scenario: Persistent storage of sensor calibration profiles and encrypted patient data logs in battery-powered wearable diagnostics devices. IC Role / Device Role / Timing Role: Low-power serial flash with 15 µA standby current and write-suspend for interrupt-driven data logging. Use Value: 2.3–3.6 V single-supply operation extends battery life; write-suspend avoids data loss during host interrupt servicing. | Use Scenario: Storing bootloader, OS kernel, and application binaries in voice-controlled smart home hubs requiring rapid firmware recovery. IC Role / Device Role / Timing Role: High-speed, pin-efficient code storage interfaced to ARM Cortex-M7 host via SQI bus. Use Value: 6 mm × 5 mm WDFN-8 package saves PCB area; continuous linear burst mode accelerates firmware load times by >3× vs. SPI. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Winbond W25Q80DVSSIG | 8-Mbit SPI-only (no SQI), max 104 MHz, 4-Kbyte sectors, 2.7–3.6 V, SOIC-8/WSON-8 packages | Lacks quad-I/O interface and Security ID; lower interface bandwidth; no AEC-Q100 qualification | Select when SQI bandwidth is unnecessary and cost-sensitive SPI compatibility suffices |
| Cypress S25FL008KAGMFI001 | 8-Mbit dual/quad SPI, 133 MHz max, 4-Kbyte sectors, 2.7–3.6 V, SOIC-8/WSON-8, no OTP Security ID | Higher clock speed but no factory-unique ID or user-programmable Security ID space | Select when maximum read throughput is prioritized over device authentication capabilities |
Compared with W25Q80DVSSIG and S25FL008KAGMFI001, the SST26VF080AT-104I/SN uniquely combines AEC-Q100 qualification, OTP Security ID with factory-unique identifier, and true SQI protocol support-enabling secure, automotive-grade, high-bandwidth firmware storage in compact WDFN-8 packaging.
Availability
SST26VF080AT-104I/SN is available at Aetrix Electronics and suitable for industrial PLCs, automotive ADAS modules, medical IoT sensors, and consumer smart home hubs requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for SST26VF080AT-104I/SN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and Flash memory solutions, serving industrial, automotive, and communications markets with high-reliability semiconductor products.
The SST26VF080AT-104I/SN belongs to Microchip's Serial Quad I/O™ (SQI™) Flash family, engineered for high-performance, low-pin-count embedded storage where bandwidth, security, and footprint efficiency are critical-especially in automotive and industrial edge devices.
FAQ
What is the maximum operating frequency of the SST26VF080AT-104I/SN and under what voltage conditions?
The SST26VF080AT-104I/SN achieves a maximum clock frequency of 104 MHz when operated within the 2.7–3.6 V supply range, rated for industrial temperature (−40°C to +85°C). At 2.3–3.6 V, the maximum frequency is reduced to 80 MHz for extended temperature operation (−40°C to +125°C). This specification is confirmed in the official Microchip datasheet DS20006203B, Section 1.0 Features.
Does the SST26VF080AT-104I/SN support both SPI and SQI protocols, and how is mode switching handled?
Yes, the SST26VF080AT-104I/SN supports full backward-compatible SPI (x1/x2) and high-speed SQI (x4) protocols. After power-on reset, it defaults to SPI mode. SQI mode is enabled by issuing the Enable Quad I/O (EQIO, 0x38) command and setting the IOC bit in the Configuration register. The IOC bit must be set before executing SQI-specific instructions like SQOR (0x6B) or SQIOR (0xEB).
What package type and pin count does the SST26VF080AT-104I/SN use, and is it RoHS-compliant?
The SST26VF080AT-104I/SN uses an 8-contact WDFN package measuring 6 mm × 5 mm, with RoHS compliance confirmed in the product documentation. Pin assignments match the SOIC-8 variant electrically, including CE#, SIO[3:0]/SI/SO/SCK, WP#, HOLD#/RESET#, VDD, and VSS. The WDFN-8 footprint supports high-density PCB layouts while maintaining signal integrity for 104 MHz operation.
How does the Security ID feature work on the SST26VF080AT-104I/SN, and can it be reprogrammed?
The SST26VF080AT-104I/SN includes a 2-Kbyte Security ID (Sec ID) space: a factory-programmed 128-bit unique identifier (read-only, non-erasable) and a user-programmable area. Users program the latter via the PSID command (0xA5) and lock it permanently using LSID (0x85). Once locked (SEC bit = 1), no further writes are possible - neither the factory nor user portion can be erased or rewritten.
Is the SST26VF080AT-104I/SN qualified for automotive applications, and what certifications does it hold?
Yes, the SST26VF080AT-104I/SN is explicitly AEC-Q100 qualified for automotive applications, as stated in the Microchip datasheet DS20006203B, Section 1.0 Features. It meets Grade 3 requirements (−40°C to +125°C extended temperature range) and supports automotive subsystems including ADAS, infotainment, and body control modules requiring high reliability and long-term data retention.
SST26VF080AT-104I/SN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- SST26 SQI®
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH
- Memory Size:
- 8Mbit
- Memory Organization:
- 1M x 8
- Memory Interface:
- SPI - Quad I/O
- Clock Frequency:
- 104 MHz
- Write Cycle Time - Word, Page:
- 1.5ms
- Access Time:
- -
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
SST26VF080AT-104I/SN FAQ
1.How can I place an order for SST26VF080AT-104I/SN through Aetrix?
Please submit a Request for Quotation (RFQ) for SST26VF080AT-104I/SN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SST26VF080AT-104I/SN reliable?
The price and inventory of SST26VF080AT-104I/SN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SST26VF080AT-104I/SN is usually 5 days.
3.What payment methods are accepted for SST26VF080AT-104I/SN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SST26VF080AT-104I/SN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SST26VF080AT-104I/SN?
SST26VF080AT-104I/SN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SST26VF080AT-104I/SN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SST26VF080AT-104I/SN?
For technical support, including SST26VF080AT-104I/SN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SST26VF080AT-104I/SN requirements.
6.How does Aetrix verify that SST26VF080AT-104I/SN is sourced from the original manufacturer or authorized distributors?
All SST26VF080AT-104I/SN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SST26VF080AT-104I/SN meets industry standards.
7.What is the process for return or replacement of SST26VF080AT-104I/SN?
All SST26VF080AT-104I/SN units undergo pre-shipment inspection (PSI). If there is an issue with SST26VF080AT-104I/SN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SST26VF080AT-104I/SN part is unused and in its original packaging.
Return procedure for SST26VF080AT-104I/SN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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