Microchip Technology SST38VF6402-90-5C-EKE
- Part No.:
- SST38VF6402-90-5C-EKE
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 48-TFSOP (0.724", 18.40mm Width)
- Datasheet:
-
SST38VF6402-90-5C-EKE.pdf
- Description:
- IC FLASH 64MBIT PARALLEL 48TSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,016
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SST38VF6402-90-5C-EKE from Microchip Technology is a 64 Mbit (4M × 16) CMOS Advanced Multi-Purpose Flash Plus memory IC, designed for nonvolatile program, configuration, and data storage in embedded systems. It operates from a single 2.7–3.6 V supply, delivers 90 ns read access time, supports 100,000 program/erase cycles, and retains data for >100 years. It is commonly used in industrial controllers and network boot firmware storage.
For engineers reviewing the SST38VF6402-90-5C-EKE datasheet, SST38VF6402-90-5C-EKE pinout, SST38VF6402-90-5C-EKE application, or SST38VF6402-90-5C-EKE equivalent, this page provides verified technical context, JEDEC-compliant x16 interface behavior, boot-block protection mapping, Page Read timing (25 ns), and validated alternative flash parts with documented memory map differences.
Technical Context
The SST38VF6402-90-5C-EKE implements a split-gate SuperFlash cell architecture with thick-oxide tunneling injector, enabling fixed erase/program times independent of cycle count. It uses standard JEDEC x16 pinout and command set, with hardware boot block protection active on Block B127 (top 32 KWord).
It supports three concurrent write detection methods - Data# Polling (DQ7), Toggle Bits (DQ6/DQ2), and RY/BY# output - and features Erase-Suspend/-Resume capability for real-time background operations. Its 16-word Write Buffer enables 1.75 µs/word effective programming when loading contiguous addresses.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 64 Mbit (4M × 16 organization), directly addressable via A21–A0 with 16-bit data bus |
| Read Access Time | 90 ns max - defines minimum clock period for asynchronous read cycles without wait states |
| Page Read Time | 25 ns per word - enables burst reads of up to 4 words from same page (A21–A2 constant) |
| Endurance | 100,000 program/erase cycles minimum - guarantees reliable field updates over product lifetime |
| Data Retention | >100 years at +25°C - ensures long-term firmware integrity without refresh |
| Supply Voltage | 2.7–3.6 V - compatible with 3.3 V logic systems and tolerant of brown-out conditions |
| Active Current | 4 mA typical at 5 MHz - determines power budget for active firmware execution |
Pinout & Package
Package: 48-ball TFBGA (10 mm × 11 mm, 0.8 mm pitch) - surface-mount, low-profile, suitable for space-constrained industrial PCBs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A21–A0 | Address Inputs | 22-bit address bus; A21–A15 select 32 KWord block, A21–A12 select 4 KWord sector |
| DQ15–DQ0 | Data I/O | 16-bit bidirectional data bus; latched internally during writes; tri-stated when CE# or OE# high |
| CE# | Chip Enable | Active-low chip select; device enters standby mode when high, reducing current to 3 µA |
| OE# | Output Enable | Active-low output gate; controls data bus drive; must be low with CE# for valid read output |
| WE# | Write Enable | Controls latching of address/data and initiates internal program/erase timing sequences |
| WP# | Write Protect | Hardware lock for top boot block (B127); grounded to prevent accidental erase/program |
| RST# | Reset | Active-low hardware reset; returns device to read mode and aborts ongoing operations |
| RY/BY# | Ready/Busy | Open-drain status indicator; low during internal program/erase, high when ready |
Key Features
| Feature | Design Value |
|---|---|
| Boot Block Protection | Hardware-enabled protection of top 32 KWord block (B127), configurable via WP# pin or software lock |
| Erase-Suspend/-Resume | Allows real-time read/program of unprotected sectors during active erase, with ≤20 µs resume latency |
| 16-Word Write Buffer | Reduces average programming time to 1.75 µs/word for sequential writes within same block |
| Auto Low Power Mode | Automatically transitions from 4 mA active read to 3 µA standby after valid read access |
| CFI Compliance | Supports Common Flash Interface commands for standardized firmware update and identification |
Applications
| Industrial PLC Firmware Storage | Network Router Boot Code |
|---|---|
Use Scenario: Storing and updating ladder logic firmware in programmable logic controllers operating in harsh environments with wide temperature swings. IC Role / Device Role / Timing Role: Nonvolatile code storage with hardware boot block protection to prevent corruption of critical startup routines. Use Value: 100,000-cycle endurance and >100-year retention ensure firmware integrity across 15+ year deployments without replacement. |
Use Scenario: Holding bootloader and OS image in enterprise-grade routers requiring secure, field-upgradable firmware. IC Role / Device Role / Timing Role: x16 parallel interface flash providing fast 90 ns read access for rapid boot sequence execution. Use Value: Page Read (25 ns/word) accelerates initialization by enabling burst fetch of instruction blocks from same memory page. |
| Medical Device Configuration Memory | Automotive Infotainment System |
Use Scenario: Retaining calibrated sensor parameters and user preferences in Class II medical equipment subject to strict regulatory traceability. IC Role / Device Role / Timing Role: Secure, one-time-programmable (OTP) Security-ID region (256 words) for cryptographic key binding. Use Value: Hardware-based WP# and software-controlled individual block locking prevent unauthorized reconfiguration during service or calibration. |
Use Scenario: Storing UI assets and navigation maps in automotive head units where vibration resistance and thermal stability are critical. IC Role / Device Role / Timing Role: High-reliability flash with SuperFlash cell structure ensuring consistent performance across –40°C to +85°C. Use Value: Fixed 18 ms sector/block erase time - unaffected by accumulated wear - simplifies deterministic firmware update timing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel NOR flash applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SST38VF6401-90-5C-EKE | Boot block located at bottom (Block B0), not top; identical timing, endurance, and voltage specs | Requires inverted boot block protection logic in system firmware; unsuitable if hardware WP# ties to top block | Select only if design requires bottom-boot configuration and firmware can accommodate B0 protection mapping |
| MX29LV640ETTI-90G | Same density (64 Mbit x16), 90 ns access, but uses different command set and lacks Erase-Suspend capability | No hardware suspend/resume support; requires full erase before partial updates; no Auto Low Power mode | Choose when legacy compatibility with Macronix command protocol is required and suspend functionality is unnecessary |
Compared with SST38VF6402-90-5C-EKE, SST38VF6401-90-5C-EKE shifts boot protection to the lowest block and requires firmware adaptation, while MX29LV640ETTI-90G omits critical real-time features like Erase-Suspend and consumes higher active current - making SST38VF6402-90-5C-EKE optimal for field-upgradable, safety-critical embedded systems.
Availability
SST38VF6402-90-5C-EKE is available at Aetrix Electronics and suitable for industrial PLCs, network infrastructure equipment, and medical diagnostic devices requiring stable component supply across extended product lifecycles.
Supply support for SST38VF6402-90-5C-EKE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor manufacturer specializing in microcontrollers, analog devices, and nonvolatile memory solutions for industrial, automotive, and communications markets.
The SST38VF6402-90-5C-EKE belongs to Microchip's Advanced Multi-Purpose Flash Plus (MPF+) family, engineered for high-reliability, low-power, field-upgradable firmware and configuration storage in resource-constrained embedded systems.
FAQ
What is the boot block location for SST38VF6402-90-5C-EKE?
The SST38VF6402-90-5C-EKE features a top-boot configuration: Block B127 (addresses A21–A15 = 1111111) is the protected boot block. This differs from SST38VF6401, which locates the boot block at B0. Hardware WP# pin protection applies exclusively to B127 in SST38VF6402-90-5C-EKE.
Does SST38VF6402-90-5C-EKE support Page Read, and what is its timing?
Yes, SST38VF6402-90-5C-EKE supports Page Read with 25 ns access time per word for up to four consecutive words within the same page (defined by A21–A2). The first word requires full 90 ns TACC; subsequent words require only TPACC (25 ns), enabling faster burst reads than standard random access.
How does the Write Buffer function in SST38VF6402-90-5C-EKE?
The SST38VF6402-90-5C-EKE includes a 16-word Write Buffer that accepts up to 16 words in a single Write-to-Buffer command sequence, then programs them collectively with a Program Buffer-to-Flash command. This reduces effective programming time to 1.75 µs per word - significantly faster than 7 µs for single-word programming.
What protection mechanisms does SST38VF6402-90-5C-EKE offer against accidental writes?
SST38VF6402-90-5C-EKE provides three-tiered protection: (1) hardware WP# pin locking of the top boot block (B127), (2) software-controlled individual 32 KWord block locking, and (3) password-protected sector-level write enable. All operate independently and can be combined for defense-in-depth security.
Is SST38VF6402-90-5C-EKE RoHS compliant and what package does it use?
Yes, SST38VF6402-90-5C-EKE is RoHS compliant and supplied in a 48-ball TFBGA package (10 mm × 11 mm, 0.8 mm pitch). This package supports fine-pitch routing, thermal dissipation in compact layouts, and automated assembly - ideal for industrial and networking equipment.
SST38VF6402-90-5C-EKE Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- SST38
- Package/Case:
- 48-TFSOP (0.724", 18.40mm Width)
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH
- Memory Size:
- 64Mbit
- Memory Organization:
- 4M x 16
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10µs
- Access Time:
- 90 ns
- Voltage - Supply:
- 2.7V ~ 3.6V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-TSOP
SST38VF6402-90-5C-EKE FAQ
1.How can I place an order for SST38VF6402-90-5C-EKE through Aetrix?
Please submit a Request for Quotation (RFQ) for SST38VF6402-90-5C-EKE on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SST38VF6402-90-5C-EKE reliable?
The price and inventory of SST38VF6402-90-5C-EKE are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SST38VF6402-90-5C-EKE is usually 5 days.
3.What payment methods are accepted for SST38VF6402-90-5C-EKE?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SST38VF6402-90-5C-EKE transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SST38VF6402-90-5C-EKE?
SST38VF6402-90-5C-EKE orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SST38VF6402-90-5C-EKE order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SST38VF6402-90-5C-EKE?
For technical support, including SST38VF6402-90-5C-EKE datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SST38VF6402-90-5C-EKE requirements.
6.How does Aetrix verify that SST38VF6402-90-5C-EKE is sourced from the original manufacturer or authorized distributors?
All SST38VF6402-90-5C-EKE products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SST38VF6402-90-5C-EKE meets industry standards.
7.What is the process for return or replacement of SST38VF6402-90-5C-EKE?
All SST38VF6402-90-5C-EKE units undergo pre-shipment inspection (PSI). If there is an issue with SST38VF6402-90-5C-EKE, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SST38VF6402-90-5C-EKE part is unused and in its original packaging.
Return procedure for SST38VF6402-90-5C-EKE:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SST38VF6402-90-5C-EKE Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

