STMicroelectronics ST10R172LT6

Overview

ST10R172LT6 from STMicroelectronics is a 16-bit ROMless microcontroller featuring a 50 MHz CPU with 40 ns instruction cycle time, 1 KB on-chip dual-port RAM, and integrated peripherals including two general-purpose timer units (GPT1/GPT2), one PWM channel, synchronous/asynchronous serial port (ASC/SSP), and 77 GPIO lines. It operates at 3.3 V ±0.3 V and supports external memory expansion up to 16 MB for industrial motor control and embedded automation applications.

For engineers reviewing the ST10R172LT6 datasheet, ST10R172LT6 pinout, ST10R172LT6 application, or ST10R172LT6 equivalent, key selection criteria include its 100-pin TQFP package, 5 V-tolerant I/Os (including fail-safe Port 5 inputs), PLL-based clock generation, PEC-accelerated data transfers, and support for demultiplexed/multiplexed 8-/16-bit external buses.

Technical Context

The ST10R172LT6 implements a register-based 16-bit CPU core with 4-stage pipeline, multiple variable register banks indexed by Context Pointer (CP), and single-cycle context switching-enabling efficient real-time task switching in deterministic embedded systems. Its architecture integrates dedicated hardware accelerators: barrel shifter, multiply/divide unit, and bit-mask generator.

Peripheral subsystem includes an 8-channel Peripheral Event Controller (PEC) for zero-overhead memory-to-memory transfers, 16-priority-level interrupt controller with 17 sources and 40 ns minimum sample rate, and configurable external bus interface with five chip-select signals, hold/halt arbitration, and programmable timing per address range.

Key Specifications

Pinout & Package

ST10R172LT6 is housed in a 100-pin Thin Quad Flat Pack (TQFP) with 0.5 mm pitch, optimized for high-density PCB layouts in industrial control modules.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 16-bit ROMless MCU applications.

Compared with ST10F168 and C167CR-LM, the ST10R172LT6 uniquely combines ROMless flexibility, 5 V fail-safe inputs, PEC-accelerated data movement, and dual-mode external bus-making it optimal for cost-sensitive, externally bootable industrial controllers requiring robust I/O interfacing.

Availability

ST10R172LT6 is available at Aetrix Electronics and suitable for industrial motor control, programmable logic controllers, automated test equipment, and power supply monitoring systems requiring stable component supply across long-lifecycle production programs.

Supply support for ST10R172LT6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader specializing in microcontrollers, power management, and automotive ICs, with strong heritage in industrial and embedded solutions.

The ST10 family was designed for high-performance real-time control applications demanding deterministic timing, rich peripheral integration, and robust I/O-targeting factory automation, motion control, and energy infrastructure.

FAQ

Is ST10R172LT6 truly ROMless, and how does it execute code?

Yes, ST10R172LT6 contains no on-chip non-volatile program memory. It boots from external memory via its configurable 8-/16-bit bus: EA pin must be tied low to force execution from external Flash or EPROM. The 16 MB linear address space and five chip-selects support multi-chip memory mapping with bank switching.

What is the function of the PEC and how does it differ from conventional DMA?

The Peripheral Event Controller (PEC) performs single-cycle memory-to-memory transfers without CPU intervention-unlike DMA, which typically requires setup overhead and interrupt servicing. Each of its 8 channels executes one byte/word move per trigger event, with optional pointer increment and transfer count decrement, ideal for burst sensor data acquisition.

Can ST10R172LT6 operate with a 5 V system while powered at 3.3 V?

Yes-its Port 5 pins (P5.10–P5.15) are 5 V fail-safe: they tolerate -0.5 V to 5.5 V regardless of VDD state, enabling safe connection to 5 V sensors or logic even during power-up/down. All other I/Os are 5 V tolerant only when VDD = 3.3 V, with absolute max rating of -0.5 V to 5.5 V.

Does ST10R172LT6 support JTAG debugging or only proprietary interfaces?

ST10R172LT6 does not include JTAG. Debugging relies on ST's proprietary OnCE (On-Chip Emulation) interface using dedicated pins (TCK, TDO, TDI, TMS) mapped to Port 2 and Port 7 functions-requiring ST-compatible emulators like STK1000 or third-party tools supporting ST10 OnCE protocol.