STMicroelectronics ST1L04PT-R
- Part No.:
- ST1L04PT-R
- Manufacturer:
- STMicroelectronics
- Package:
- TO-252-5, DPAK (4 Leads + Tab), TO-252AD
- Datasheet:
-
ST1L04PT-R.pdf
- Description:
- IC REG LINEAR POS ADJ 1A PPAK
- Quantity:
- Payment:

- Shipping:

Inventory:3,004
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Product details
Overview
ST1L04PT-R from STMicroelectronics is an adjustable low-dropout linear voltage regulator delivering up to 1 A output current with 0.8 V minimum output voltage, ±2% reference accuracy at 25 °C, and max. 3 mA quiescent current over 0–125 °C junction temperature. It operates with low-ESR ceramic capacitors only and integrates thermal shutdown with 5 °C hysteresis and current limiting. It is used in VID power supplies and post-regulation for 3.3 V switching regulators.
For engineers reviewing the ST1L04PT-R datasheet, ST1L04PT-R pinout, ST1L04PT-R application, or ST1L04PT-R equivalent, key selection criteria include dropout voltage (1 V @ 1 A), reference voltage stability (0.776–0.824 V), load/line regulation (0.8%), adjustment current (1 µA), and PPAK package thermal resistance (8 °C/W junction-to-case).
Technical Context
The ST1L04PT-R implements an internal bandgap reference (0.8 V nominal) and error amplifier driving a PMOS pass transistor, enabling adjustable output via external resistor divider on the ADJ pin. Its architecture supports low-voltage operation down to 0.8 V while maintaining regulation across input voltages from 2.8 V to 5.5 V.
Protection logic includes foldback current limiting and thermal shutdown triggered at 165 °C with 5 °C hysteresis, ensuring safe recovery after fault conditions. Stability is guaranteed with ≥2.2 µF ceramic output capacitance and ≤200 mΩ ESR, eliminating need for tantalum or electrolytic capacitors.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output current | 1 A min., supports high-current low-voltage ASIC core rails |
| Dropout voltage | 1 V @ 1 A, enables regulation from 1.8 V output with 2.8 V input |
| Quiescent current | ≤3 mA over full temp range, critical for battery-backed systems |
| Reference voltage | 0.776–0.824 V (±2% @ 25 °C), sets output accuracy baseline |
| Line/load regulation | 0.8%, ensures stable output under input or load transients |
| Adjustment current | 1 µA typ., minimizes resistor-divider power loss and error |
| Thermal shutdown | 165 °C trip with 5 °C hysteresis, prevents latch-up during overload |
Pinout & Package
ST1L04PT-R uses the PPAK (Power Package) surface-mount package with exposed thermal pad connected to GND. Dimensions: 6.0 × 6.4 × 1.0 mm (L × W × H), with 5-pin configuration and 1.27 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 – VI | Input supply rail | Bypassed with ≥4.7 µF ceramic capacitor to GND for stability |
| 2 – N.C. | No connection | Internally unconnected; must remain floating or grounded per layout |
| 3 – GND | Ground reference & thermal path | Exposed metal pad soldered to PCB ground plane for thermal dissipation |
| 4 – ADJ | Voltage feedback node | Connects center tap of R1/R2 divider; 1 µA bias current enables precise VO = VREF(1+R1/R2) |
| 5 – VO | Regulated output | Requires ≥2.2 µF ceramic capacitor with ≤200 mΩ ESR for stability |
Key Features
| Feature | Design Value |
|---|---|
| Adjustable output range | 0.8 V to VI − VD, supports sub-1 V core supplies and dynamic VID scaling |
| Low-ESR capacitor support | Stable with ≥2.2 µF ceramic only-no electrolytics required, reducing board area and cost |
| Thermal protection | Hysteresis-enabled shutdown (165 °C trip / 160 °C recovery) prevents cycling during sustained overload |
| High PSRR | 50 dB @ 120 Hz, suppresses ripple from upstream switching regulators in hybrid power architectures |
| Ultra-low IQ | ≤3 mA over 0–125 °C, extends runtime in always-on subsystems (e.g., RTC, wake-up logic) |
Applications
| Notebook PC Core Power | Low-Voltage ASIC Supply |
|---|---|
Use Scenario: Regulating CPU/GPU core voltage in ultraportable notebooks where input rails are derived from 3.3 V buck converters. IC Role / Device Role / Timing Role: Post-regulator providing precise, low-noise 0.9–1.2 V core supply with fast transient response. Use Value: Enables compliance with tight VID tolerance (±2%) and reduces system-level ripple by 50 dB at 120 Hz. | Use Scenario: Powering FPGA I/O banks or SoC peripheral domains requiring stable 1.8 V from a 2.8 V intermediate rail. IC Role / Device Role / Timing Role: Low-dropout linear regulator supplying noise-sensitive analog or SerDes circuitry. Use Value: Delivers <0.003% VO output noise (10 Hz–10 kHz) and maintains regulation down to 100 µA minimum load. |
| VID Power Supply | Cost-Sensitive Post-Regulation |
Use Scenario: Implementing programmable voltage identification (VID) outputs for microprocessor voltage scaling using external DAC-controlled resistor divider. IC Role / Device Role / Timing Role: Adjustable LDO with 1 µA ADJ pin current enabling high-impedance, low-power VID interface. Use Value: Allows use of MΩ-range divider resistors, minimizing standby current and thermal drift impact on VO accuracy. | Use Scenario: Adding clean, low-noise 3.3 V output to legacy 5 V systems using inexpensive buck converters with poor PSRR. IC Role / Device Role / Timing Role: Final-stage regulator removing switching artifacts before powering ADC references or op-amp supplies. Use Value: Achieves 20 dB PSRR at 100 kHz, suppressing high-frequency switching noise without ferrite beads or LC filters. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar adjustable LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TSM1085CP | Fixed 3.3 V output; no ADJ pin; 1.5 A current limit; 1.3 V dropout @ 1.5 A | Not adjustable; unsuitable for VID or sub-1 V designs | Select when fixed 3.3 V output and higher current headroom are required, and adjustability is unnecessary. |
| MCP1826T-ADJE/DC | 0.8 V reference; 1.5 A output; 25 µA quiescent current; requires ≥10 µF output cap | Higher IQ limits battery life; larger output cap increases BOM cost and footprint | Prefer for higher current needs if system can tolerate 25× higher quiescent current and added capacitor size. |
Compared with TSM1085CP and MCP1826T-ADJE/DC, ST1L04PT-R uniquely balances ultra-low IQ (≤3 mA), true 0.8 V adjustability, and ceramic-cap-only stability-making it optimal for space-constrained, battery-aware, and dynamically scaled power domains.
Availability
ST1L04PT-R is available at Aetrix Electronics and suitable for notebook PCs, low-voltage ASIC supplies, and VID power supplies requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for ST1L04PT-R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, MCU, power, and sensor solutions for industrial, automotive, and consumer markets.
The ST1L04 belongs to ST's high-precision, low-quiescent-current LDO family, engineered specifically for post-regulation and low-voltage core supply applications where efficiency, noise, and thermal behavior are critical.
FAQ
What is the minimum output capacitor value and ESR requirement for ST1L04PT-R stability?
The ST1L04PT-R requires a minimum 2.2 µF ceramic output capacitor with ESR ≤200 mΩ. This specification is validated per the datasheet's stability criteria and eliminates need for bulk electrolytic capacitors. Using lower capacitance or higher ESR risks oscillation under load transients, especially near 1 A output current.
Can ST1L04PT-R be used with input voltages below 2.8 V?
No. The absolute maximum ratings specify VI ≥ –0.3 V, but functional operation requires VI ≥ 2.8 V per electrical characteristics. Below this, dropout margin collapses and regulation fails-even at low output voltages like 0.8 V-due to insufficient headroom for the internal pass device and reference circuitry.
How does the ADJ pin current affect output voltage accuracy?
The ADJ pin draws 1 µA typ. (max 1.2 µA), introducing a small offset error in the resistor divider: VO = VREF(1 + R1/R2) + IADJ·R1. For R1 = 10 kΩ, this adds ~10 mV error. Accuracy remains within ±2% when using R1 ≤ 10 kΩ and accounting for IADJ in design calculations per the datasheet equation.
Is the exposed thermal pad on the PPAK package electrically connected?
Yes. Pin 3 (GND) and the exposed metallic thermal pad are internally shorted and must be soldered to a PCB ground plane. This connection provides both the primary return path for ground current and the dominant thermal conduction path-reducing junction-to-board thermal resistance by up to 90% versus non-connected pads.
ST1L04PT-R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- TO-252-5, DPAK (4 Leads + Tab), TO-252AD
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Adjustable
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 10V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 9V
- Voltage Dropout (Max):
- 1V @ 1A
- Current - Output:
- 1A
- Current - Quiescent (Iq):
- 3 mA
- Current - Supply (Max):
- -
- PSRR:
- 50dB ~ 20dB (120Hz ~ 100kHz)
- Control Features:
- -
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- 0°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PPAK
ST1L04PT-R FAQ
1.How can I place an order for ST1L04PT-R through Aetrix?
Please submit a Request for Quotation (RFQ) for ST1L04PT-R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ST1L04PT-R reliable?
The price and inventory of ST1L04PT-R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ST1L04PT-R is usually 5 days.
3.What payment methods are accepted for ST1L04PT-R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ST1L04PT-R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ST1L04PT-R?
ST1L04PT-R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ST1L04PT-R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ST1L04PT-R?
For technical support, including ST1L04PT-R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ST1L04PT-R requirements.
6.How does Aetrix verify that ST1L04PT-R is sourced from the original manufacturer or authorized distributors?
All ST1L04PT-R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ST1L04PT-R meets industry standards.
7.What is the process for return or replacement of ST1L04PT-R?
All ST1L04PT-R units undergo pre-shipment inspection (PSI). If there is an issue with ST1L04PT-R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ST1L04PT-R part is unused and in its original packaging.
Return procedure for ST1L04PT-R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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