STMicroelectronics ST2349AQTR

Overview

ST2349AQTR from STMicroelectronics is a 4-bit bidirectional dual-supply level translator IC with no direction control pin, supporting VL from 1.65 V to 3.6 V and VCC from 1.8 V to 5.5 V, enabling voltage translation between low-voltage ASICs/PLDs and higher-voltage systems in I²C and UART interfaces, with up to 18 Mbps data rate when driven by totem-pole drivers.

For engineers reviewing the ST2349AQTR datasheet, ST2349AQTR pinout, ST2349AQTR application, or ST2349AQTR equivalent, this device is selected for bi-directional logic-level translation in space-constrained mobile and portable electronics where power-down mode, 5.5 V-tolerant enable, and ±2 kV HBM ESD protection are critical design requirements.

Technical Context

The ST2349A uses a transmission-gate-based architecture to achieve true bidirectional level shifting without direction control, relying on internal pass-transistor conduction controlled by local rail voltages. Its I/O ports are electrically isolated between VL and VCC domains, with each I/O pair (e.g., I/OVL1 ↔ I/OVCC1) forming an independent translation channel.

It supports two distinct driver types: open-drain (max 6.8 Mbps) and totem-pole (max 18 Mbps), with propagation delays as low as 1.9 ns (tPLH, VL=2.7–3.6 V, VCC=4.3–5.5 V). The OE pin is referenced to VL and tolerates up to 5.5 V, enabling direct interfacing with higher-voltage control logic.

Key Specifications

Pinout & Package

ST2349AQTR is housed in a QFN16 package (2.6 mm × 1.8 mm × 0.55 mm, 0.4 mm pitch) with wettable flanks and exposed thermal pad. The package is RoHS-compliant and ECOPACK® certified.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar bidirectional level translation applications.

Compared with TXS0104E and SN74AVC4T245, ST2349AQTR uniquely combines directionless bidirectional operation, 5.5 V-tolerant OE, and guaranteed power-down behavior during VL/VCC loss - making it the only option among the three qualified for battery-powered I²C subsystems requiring zero-leakage shutdown.

Availability

ST2349AQTR is available at Aetrix Electronics and suitable for mobile phone interfaces, I²C subsystems, and UART bridging applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for ST2349AQTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, digital, and mixed-signal ICs for automotive, industrial, and consumer markets.

The ST2349A belongs to ST's level translation product line, engineered specifically for low-power, space-constrained multi-voltage system interconnects in portable electronics and IoT edge nodes.

FAQ

Can ST2349AQTR translate between 1.2 V and 3.3 V logic levels?

No. The minimum VL supply is 1.65 V per datasheet Section 4.1. Operating below 1.65 V violates recommended conditions and risks incorrect logic thresholds, increased propagation delay, and potential I/O leakage. For 1.2 V interfaces, consider ST's ST2339 series or TI's TXS0102.

Is the OE pin active-high or active-low?

The OE pin is active-low: when OE is pulled low (≤0.75 V at VL = 3.6 V), all I/Os enter high-impedance state. When OE is high (≥2.0 V at VL = 3.6 V), translation is enabled. OE is VL-referenced but 5.5 V tolerant, allowing direct connection to 5 V control signals.

Does ST2349AQTR require external pull-up resistors?

Yes - external pull-up resistors are required on both VL and VCC sides of each I/O pair to establish valid HIGH logic levels. The device does not include internal pull-ups; typical values are 4.7 kΩ (I²C) or 10 kΩ (UART), selected based on bus capacitance and speed requirements.

What happens if VCC is powered but VL is unpowered?

When VL is unpowered (0 V or floating) and OE is high, the I/OVL pins enter high-impedance state due to internal power-down circuitry, preventing back-current into the VL rail. All I/OVCC pins remain functional but cannot drive or receive valid logic from the VL side - the device operates asymmetrically until VL is restored.