STMicroelectronics ST2S06A33PQR

Overview

ST2S06A33PQR from STMicroelectronics is a dual synchronous step-down DC-DC converter with reset function, delivering up to 0.5 A per channel across 2.5–5.5 V input, fixed 3.3 V output on Channel 1, and adjustable 1.2 V output on Channel 2, operating at 1.5 MHz PWM with 2% output voltage tolerance and >90% efficiency at full load.

For engineers reviewing the ST2S06A33PQR datasheet, ST2S06A33PQR pinout, ST2S06A33PQR application, or ST2S06A33PQR equivalent, key selection criteria include dual-channel independent regulation, integrated NMOS/PMOS power switches (R_DS(on) = 150 mΩ / 200 mΩ typ.), QFN12L (4×4 mm) thermal performance (R_thJA = 60 °C/W), and reset-triggered power sequencing for ODD digital core supplies.

Technical Context

The ST2S06A33PQR implements a current-mode PWM architecture with fixed 3.3 V output on VO1 (via internal resistor divider) and adjustable VO2 set by external FB2 feedback. It integrates dual high-side PMOS and low-side NMOS synchronous rectifiers per channel, eliminating external diodes and enabling >90% efficiency at 0.5 A.

Thermal shutdown activates at 150 °C (15 °C hysteresis), and cycle-by-cycle current limiting protects against short-circuit faults. The internal soft-start generates a 50–100 µs power-on delay and limits inrush current, while the reset-out pin provides system-level power-good signaling with 80–85 ms delay after VIN_A exceeds 4.6 V (rising edge).

Key Specifications

Pinout & Package

ST2S06A33PQR is housed in a thermally enhanced QFN12L (4 × 4 mm, 0.9 mm height) package with exposed thermal pad, supporting R_thJA = 60 °C/W and R_thJC = 10 °C/W for high-density PCB layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-output synchronous buck regulator applications.

Compared with TPS65023RSBR and RT8070ZSP, ST2S06A33PQR uniquely combines fixed 3.3 V + adjustable 1.2 V outputs, integrated reset generation, and QFN12L thermal performance-making it optimal for cost-sensitive, thermally constrained ODD and portable media applications requiring deterministic power-up behavior.

Availability

ST2S06A33PQR is available at Aetrix Electronics and suitable for optical disc drive power management, portable media player subsystems, and industrial camera sensor interfaces requiring stable component supply, consistent parametric performance, and long-term production support.

Supply support for ST2S06A33PQR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, MCU, power, and sensor solutions for industrial, automotive, and consumer markets.

The ST2S06 series belongs to ST's high-efficiency DC-DC converter portfolio, engineered specifically for replacing linear regulators in low-voltage digital core supplies where thermal density and board space are critical constraints.

FAQ

What is the purpose of the HV pin on ST2S06A33PQR?

The HV pin is a configuration terminal that must be left floating or connected to GND to select internal reference mode and disable unused features. It is not a voltage input or power pin. Leaving it unconnected enables the default 3.3 V fixed output on Channel 1 and activates the reset function. Connecting it to GND disables reset and allows full adjustability on both channels-per datasheet Table 2 and Figure 21.

Can ST2S06A33PQR operate with only one output enabled?

Yes-ST2S06A33PQR supports independent channel operation. Channel 1 (3.3 V) remains active whenever VIN_SW and VIN_A are powered. Channel 2 (1.2 V) can be disabled by leaving FB2 open or pulling it below 0.3 V, which halts switching on SW2 while maintaining regulation on VO1. This is confirmed in Section 7 (Application Information) and electrical characteristics Table 6, where IO1,2 test conditions specify independent load ranges.

How does the reset function behave during brown-out conditions?

The reset function monitors VIN_A and asserts Reset_out low when VIN_A falls below 4.2 V (typical falling threshold). After recovery, it waits 85 ms before de-asserting Reset_out-ensuring stable power before releasing downstream logic. This hysteresis (4.2 V fall vs. 4.6 V rise) prevents chatter during marginal supply conditions, as specified in Table 6 and validated in Figure 16.

What PCB layout practices are mandatory for thermal performance?

A 12 mm² exposed thermal pad beneath the QFN12L package must be soldered to a solid copper plane using ≥6 thermal vias (0.3 mm diameter) connected to inner-layer ground planes. Input capacitors (4.7 µF) must be placed within 3 mm of VIN_SW and GND1/GND2 pins, and inductors must be oriented to minimize mutual coupling. These requirements are defined in Section 8 (Package Mechanical Data) and Figure 24.