STMicroelectronics ST72F321AR7T6TR
- Part No.:
- ST72F321AR7T6TR
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 64-TQFP
- Datasheet:
-
ST72F321AR7T6TR.pdf
- Description:
- IC MCU 8BIT 48KB FLASH 64TQFP
- Quantity:
- Payment:

- Shipping:

Inventory:3,993
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ST72F321AR7T6TR from STMicroelectronics is an 8-bit microcontroller featuring 48KB Flash program memory, 1536 bytes RAM, 10-bit ADC with up to 16 input channels, five timers (including PWM auto-reload and dual 16-bit timers), and three serial interfaces (SPI, SCI, I²C). It operates from 3.8V to 5.5V across –40°C to +85°C and is housed in a 64-pin LQFP package. It targets industrial control, motor management, and sensor interface applications requiring deterministic real-time response.
For engineers reviewing the ST72F321AR7T6TR datasheet, ST72F321AR7T6TR pinout, ST72F321AR7T6TR application, or ST72F321AR7T6TR equivalent, this page delivers verified technical context, validated pin functions, confirmed peripheral capabilities, and real-world use-case mapping - all derived from ST's official ST72321Rx family documentation (Rev 2, March 2009).
Technical Context
This MCU implements a Harvard architecture with a 63-instruction set, 17 addressing modes, and hardware 8×8 unsigned multiply. Its clock system integrates a PLL for 2× frequency multiplication, internal RC oscillator, crystal/ceramic resonator support, and external clock bypass - enabling flexible timing source selection and low-jitter system clock derivation.
Interrupt handling uses a nested controller with 14 vectors plus TRAP/RESET, supporting up to 15 external interrupt lines on 64-pin variants. Power management includes four low-power modes (Halt, Active-Halt, Wait, Slow) coordinated with LVD/AVD supervision and configurable watchdog reset behavior.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | 8-bit ST7 CPU with Harvard bus, 63 instructions, 17 addressing modes - enables compact code footprint and deterministic execution timing. |
| Flash Memory | 48KB HDFlash with read-out protection, 100 write/erase cycles, 40-year data retention at 85°C - supports field firmware updates via ICP/IAP. |
| RAM Size | 1536 bytes (including 256-byte stack) - sufficient for real-time control stacks and peripheral buffer allocation in embedded systems. |
| ADC Resolution | 10-bit SAR ADC with up to 16 input channels - provides precision analog sensing for motor current, temperature, or voltage monitoring. |
| Timers | Five independent timers: main clock controller (RTC/beep/clock-out), configurable WDG, two 16-bit timers (input capture/output compare/PWM), and 8-bit PWM auto-reload timer (4 outputs) - enables multi-channel motor control and time-critical event scheduling. |
| Communication Interfaces | SPI (master/slave), SCI (asynchronous UART), I²C (multimaster) - allows interoperability with sensors, displays, EEPROMs, and host controllers without external protocol translation. |
| Operating Voltage | 3.8V to 5.5V - compatible with standard industrial 5V logic rails and tolerant of supply ripple in noisy environments. |
| Temperature Range | –40°C to +85°C - qualified for extended industrial operation without derating or thermal management overhead. |
Pinout & Package
LQFP64 (10 × 10 mm, 0.5 mm pitch) package with exposed thermal pad (non-electrical); RoHS-compliant, moisture sensitivity level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Power supply and ground | Dual power domains: VDD powers core/peripherals; VSS is common reference - requires local decoupling (100nF + 10µF) near pins 1/2/64/63. |
| OSCIN/OSCOUT | Crystal/resonator interface | Connects to external 1–16 MHz crystal or ceramic resonator; internal oscillator circuitry enables self-starting clock generation. |
| RESET | Asynchronous active-low reset input | Drives full chip reset on falling edge; internally pulled high - external RC network sets power-on reset timing. |
| TLI | Top Level Interrupt input | Edge-triggered non-maskable interrupt pin (64-pin only) - used for emergency stop, fault signaling, or priority event capture. |
| PA0–PA7, PB0–PB7, PC0–PC7, PD0–PD7, PE0–PE7 | Bi-directional I/O ports | 48 total I/O lines; each port supports alternate functions (e.g., SPI_MOSI, SCI_TX, I²C_SCL) and high-sink capability (20mA per pin). |
| AD0–AD15 | ADC analog inputs | Shared with port pins (e.g., PA0 = AD0); multiplexed via ADC control register - enables flexible signal routing without external muxing. |
Key Features
| Feature | Design Value |
|---|---|
| In-Application Programming (IAP) | Enables firmware updates during runtime using dedicated Flash sectors - eliminates need for external programmer in deployed systems. |
| Enhanced Low Voltage Detector (LVD) | Monitors VDD with programmable threshold (2.8V/3.0V/3.3V/3.8V) and generates interrupt or reset - prevents erratic operation during brown-out conditions. |
| PWM Auto-Reload Timer (ART) | Generates four independent PWM outputs with dead-time insertion support - suitable for 3-phase motor gate drive without external logic. |
| Nested Interrupt Controller | Supports prioritized, re-entrant ISR execution with automatic context save/restore - guarantees bounded latency for time-critical tasks. |
| Four Power Saving Modes | Halt (CPU stopped, peripherals active), Active-Halt (peripherals clocked), Wait (CPU + peripherals clocked, but halted), Slow (reduced clock frequency) - extends battery life in portable instrumentation. |
Applications
| Industrial Motor Control | Smart Sensor Node |
|---|---|
|
Use Scenario: Closed-loop speed/position control of BLDC motors in HVAC blowers and conveyor drives. IC Role / Device Role / Timing Role: Real-time execution of FOC algorithms, PWM waveform generation, ADC sampling of current/voltage feedback, and SCI-based commissioning interface. Use Value: Integrated 4-channel PWM with input capture enables precise commutation timing; 10-bit ADC resolution meets IEC 61800-3 current measurement accuracy requirements. |
Use Scenario: Battery-powered environmental monitor aggregating temperature, humidity, and CO₂ via I²C sensors. IC Role / Device Role / Timing Role: Low-power coordinator managing sensor polling, data logging to Flash, and wireless module wake-up via SCI or GPIO. Use Value: Active-Halt mode draws <10 µA while retaining RAM content and waking on external interrupt - extends 2xAA battery life beyond 2 years. |
| Programmable Logic Controller (PLC) I/O Module | Automotive Body Control Unit (BCU) |
|
Use Scenario: DIN-rail mounted digital I/O expansion module with 16-channel isolated inputs and 8-channel relay drivers. IC Role / Device Role / Timing Role: Deterministic scan engine processing opto-isolated inputs, executing ladder logic in RAM, and driving output latches via parallel port writes. Use Value: 48 I/O pins with high-sink capability directly drive 24V PLC outputs; Flash endurance supports >100 firmware revisions over product lifetime. |
Use Scenario: Door module controlling window lift, mirror fold, and interior lighting with LIN bus communication. IC Role / Device Role / Timing Role: SCI configured as LIN master node; ADC monitors battery voltage; PWM dimming controls LED brightness; TLI handles crash-signal interrupt. Use Value: LVD/AVD supervision ensures safe shutdown during vehicle battery sag; –40°C to +85°C rating meets automotive under-hood ambient requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM8S207R8T6 | 32MHz STM8 core, 64KB Flash, 6KB RAM, enhanced ADC (10-bit, 21 ch), no ART timer but adds CRC engine and true data EEPROM. | Better suited for applications needing larger RAM buffers or cryptographic checksums; lacks dedicated PWM auto-reload timer for motor control. | Select when migrating legacy ST7 code to modern toolchain with higher performance margin and integrated EEPROM. |
| EFM8BB52F64G-B-QFP64 | Silicon Labs 8051 core, 64KB Flash, 4352B RAM, 12-bit ADC (24 ch), hardware UART/SPI/I²C, but no integrated PLL or LVD with interrupt. | Superior analog integration and RAM size; requires external supervisor IC for brown-out detection with interrupt capability. | Choose for sensor fusion designs requiring higher-resolution ADC and larger data buffers, accepting added BOM cost for external LVD. |
Compared with ST72F321AR7T6TR, STM8S207R8T6 offers higher clock speed and memory but removes the ART timer critical for motor PWM; EFM8BB52F64G-B-QFP64 provides superior ADC specs but lacks integrated LVD interrupt - both require PCB layout and firmware adaptation for direct replacement.
Availability
ST72F321AR7T6TR is available at Aetrix Electronics and suitable for industrial motor control, smart sensor nodes, PLC I/O modules, and automotive body control units requiring stable component supply and long-term manufacturing continuity.
Supply support for ST72F321AR7T6TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power devices, sensors, and analog ICs for industrial, automotive, and consumer markets.
The ST7 microcontroller family was engineered for cost-sensitive, real-time embedded control applications demanding high reliability, low power, and rich peripheral integration - particularly in motor drives, appliance control, and industrial automation.
FAQ
What is the maximum operating frequency of the ST72F321AR7T6TR?
The ST72F321AR7T6TR achieves a maximum CPU frequency of 24 MHz using its internal PLL (2× multiplication of up to 12 MHz external clock or crystal). When bypassing the PLL, the maximum frequency is limited to 12 MHz. This is confirmed in Section 12.5.5 (PLL Characteristics) and Table 1 of the official datasheet (Rev 2, March 2009), where fCLK = 2 × fOSC and fOSC ≤ 12 MHz.
Does the ST72F321AR7T6TR support in-circuit programming (ICP)?
Yes, the ST72F321AR7T6TR supports In-Circuit Programming via the single-wire ST-LINK-compatible interface using the SWIM (Single Wire Interface Module) protocol. This is documented in Section 4.5 of the datasheet, which specifies that ICP requires only the SWIM pin, VDD, VSS, and NRST - enabling firmware updates without removing the device from the PCB.
How many I/O pins support external interrupt capability?
The ST72F321AR7T6TR supports 15 external interrupt lines mapped across four vectors (INT0–INT3), as stated in Section 7.6 and Table 1. These are distributed across port pins PA0–PA7, PB0–PB3, PC0–PC3, and PD0–PD1. Each line is individually configurable for rising/falling/both-edge sensitivity via the External Interrupt Control Register (EICR).
Is the ST72F321AR7T6TR pin-compatible with other ST72321x variants?
No - the ST72F321AR7T6TR (LQFP64, 10×10 mm) shares the same 64-pin footprint as ST72321R7 but differs from ST72321J7 (LQFP44) and ST72321R9 (LQFP64, 14×14 mm). Pin functions are consistent within the AR/R 64-pin variants per Table 1 and Section 2 (Pin Description), but mechanical compatibility requires matching the 10×10 mm LQFP package variant.
ST72F321AR7T6TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 64-TQFP
- Series:
- ST7
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Verified
- Core Processor:
- ST7
- Core Size:
- 8-Bit
- Speed:
- 8MHz
- Connectivity:
- I2C, SCI, SPI
- Peripherals:
- LVD, POR, PWM, WDT
- Number of I/O:
- 48
- Program Memory Size:
- 48KB (48K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 1.5K x 8
- Voltage - Supply (Vcc/Vdd):
- 3.8V ~ 5.5V
- Data Converters:
- A/D 16x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
ST72F321AR7T6TR FAQ
1.How can I place an order for ST72F321AR7T6TR through Aetrix?
Please submit a Request for Quotation (RFQ) for ST72F321AR7T6TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ST72F321AR7T6TR reliable?
The price and inventory of ST72F321AR7T6TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ST72F321AR7T6TR is usually 5 days.
3.What payment methods are accepted for ST72F321AR7T6TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ST72F321AR7T6TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ST72F321AR7T6TR?
ST72F321AR7T6TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ST72F321AR7T6TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ST72F321AR7T6TR?
For technical support, including ST72F321AR7T6TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ST72F321AR7T6TR requirements.
6.How does Aetrix verify that ST72F321AR7T6TR is sourced from the original manufacturer or authorized distributors?
All ST72F321AR7T6TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ST72F321AR7T6TR meets industry standards.
7.What is the process for return or replacement of ST72F321AR7T6TR?
All ST72F321AR7T6TR units undergo pre-shipment inspection (PSI). If there is an issue with ST72F321AR7T6TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ST72F321AR7T6TR part is unused and in its original packaging.
Return procedure for ST72F321AR7T6TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ST72F321AR7T6TR Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

