STMicroelectronics ST92F124V1TB
- Part No.:
- ST92F124V1TB
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
ST92F124V1TB.pdf
- Description:
- IC MCU 8/16B 128KB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:4,361
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Product details
Overview
ST92F124V1TB from STMicroelectronics is an 8/16-bit single-voltage Flash microcontroller with integrated CAN 2.0B and J1850 BLPD interfaces, 128 KB Flash, 6 KB RAM, and 1 KB emulated EEPROM (E³™). It operates at up to 24 MHz internal clock, supports 4.5–5.5 V supply, and features dual 16-bit multifunction timers, two CAN controllers, and a 10-bit 16-channel ADC - deployed in automotive body control modules requiring robust serial communication and real-time I/O management.
For engineers reviewing the ST92F124V1TB datasheet, ST92F124V1TB pinout, ST92F124V1TB application, or ST92F124V1TB equivalent, key selection considerations include CAN 2.0B timing compliance, J1850 BLPD decoder support, Flash IAP capability, and LQFP100 package compatibility with automotive-grade thermal and EMI requirements.
Technical Context
The ST92F124V1TB implements a register-oriented 8/16-bit ST9 core with RUN, WFI, SLOW, HALT, and STOP power modes. Its PLL clock generator accepts 3–5 MHz crystals to derive system clocks up to 24 MHz, achieving a minimum instruction time of 83 ns. Memory architecture includes segmented addressing via MMU with DPR/CSR registers enabling 64-Kbyte code segments and 16-Kbyte data pages.
Interrupt handling uses a multi-level priority scheme (7 levels) with dedicated on-chip peripheral vectors and dynamic priority modification. The Wake-up/Interrupt Lines Management Unit (WUIMU) supports up to 16 pins as programmable wake-up sources, independent of external interrupt lines, enhancing low-power system responsiveness.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | ST9 8/16-bit register-oriented CPU with 224 general-purpose registers usable as RAM, accumulators, or index pointers |
| Flash Memory | 128 KB single-voltage Flash supporting In-Application Programming (IAP) and sector erase for firmware updates in field |
| RAM & Emulated EEPROM | 6 KB SRAM + 1 KB E³™ (Emulated EEPROM) with wear-leveling and data retention >10 years at 85°C |
| CAN Interface | Two independent CAN 2.0B Active controllers compliant with ISO 11898, supporting bit rates up to 1 Mbps and message filtering |
| J1850 BLPD | Dedicated J1850 Byte Level Protocol Decoder for GM/Ford vehicle diagnostics, supporting PWM and VPW physical layers |
| ADC | 10-bit SAR ADC with 16 input channels, low-current coupling, and configurable sampling windows for sensor monitoring |
| Timers | Two 16-bit Multifunction Timers (MFTs), two 16-bit Extended Function Timers (EFTs), one Standard Timer, and watchdog timer with hardware/software activation |
Pinout & Package
LQFP100 (14 × 14 mm, 0.5 mm pitch) package with exposed thermal pad; 80 configurable I/O pins including dedicated CANH/CANL, J1850 TX/RX, SCI-M/SCI-A, SPI, I²C, and ADC inputs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PB0–PB7 | Port B I/O with alternate functions | Configurable as CAN1_RX, CAN1_TX, SCI-M RX/TX, or general-purpose I/O with pull-up/pull-down control |
| PC0–PC7 | Port C I/O with alternate functions | Supports CAN2_RX/CAN2_TX, J1850_BLPD_IN/OUT, and MFT/EFT capture/compare signals |
| PD0–PD7 | Port D I/O with alternate functions | Provides SCI-A TX/RX, SPI MOSI/MISO/SCK, and ADC channel inputs (AD0–AD7) |
| PE0–PE7 | Port E I/O with alternate functions | Includes external memory interface signals (AS, DS, RW), WAIT, and additional ADC inputs (AD8–AD15) |
| VDD/VSS | Power supply terminals | Dual 5 V supply domains: VDDA (analog) and VDDD (digital), each with dedicated decoupling pads per datasheet layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| Single-voltage Flash programming | Enables in-system firmware updates without high-voltage programming circuitry - reduces BOM cost and simplifies production test |
| E³™ Emulated EEPROM | Provides nonvolatile parameter storage with byte-write capability and automatic wear leveling - eliminates external EEPROM chip |
| Dual CAN 2.0B controllers | Allows concurrent operation on separate buses (e.g., powertrain + body networks) with independent message buffers and filtering logic |
| J1850 BLPD hardware accelerator | Offloads LIN/J1850 protocol parsing from CPU, reducing interrupt latency and ensuring deterministic diagnostic response times |
| MMU-based memory segmentation | Supports secure code/data isolation across 64-Kbyte segments and 16-Kbyte pages - essential for OSEK-compliant RTOS partitioning |
Applications
| Body Control Module (BCM) | Door Module Controller |
|---|---|
Use Scenario: Centralized management of lighting, window lift, mirror adjustment, and door lock actuation in passenger vehicles. IC Role / Device Role / Timing Role: Primary MCU executing CAN-based command arbitration, J1850 diagnostics, and real-time PWM generation for motor drivers. Use Value: Dual CAN interfaces enable simultaneous communication with gateway and local LIN sub-nodes; E³™ stores user preferences and fault logs without external NVM. |
Use Scenario: Local control of power windows, central locking, and anti-pinch detection in front/rear door assemblies. IC Role / Device Role / Timing Role: Safety-critical timing controller using MFT input capture for encoder feedback and watchdog supervision of motor current sensing. Use Value: 10-bit ADC with 16 channels monitors multiple current sensors and thermistors; STOP mode achieves <10 µA standby current for battery conservation. |
| Roof Module (Sunroof/Convertibles) | Seat Position Memory System |
Use Scenario: Precision control of sunroof glass/motorized canvas movement with obstacle detection and position tracking. IC Role / Device Role / Timing Role: Real-time motion controller using EFT output compare for smooth ramp-up/ramp-down profiles and SCI-A for LIN slave communication. Use Value: Two independent EFTs generate synchronized PWM outputs for dual-motor drive; J1850 BLPD enables OEM-specific diagnostic access during service. |
Use Scenario: Storing and recalling driver seat, mirror, and steering column positions via CAN commands and nonvolatile memory. IC Role / Device Role / Timing Role: Parameter manager with E³™ emulation for >100,000 write cycles and CAN message filtering to isolate seat-related frames. Use Value: 1 KB E³™ retains calibrated positions across ignition cycles; dual CAN ports allow separation of configuration traffic from infotainment bus. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ST92F150CV1 | 160 KB Flash, 8 KB RAM, same core/peripherals but higher memory density and extended temperature range (–40°C to +125°C) | Preferred for new designs requiring larger firmware footprint or under-hood deployment | Select when future firmware expansion or extended ambient operating range is required; pin-compatible with ST92F124V1TB in LQFP100 |
| NXP SPC560B50L3 | 32-bit Power Architecture core, 512 KB Flash, 48 KB RAM, CAN FD support, no J1850 BLPD | Targets next-gen platforms needing CAN FD bandwidth and ASIL-B functional safety certification | Choose only if migrating to 32-bit architecture and CAN FD; requires full software re-architecture and lacks J1850 hardware decode |
Compared with ST92F124V1TB, ST92F150CV1 offers direct scalability within the same toolchain and pinout, while SPC560B50L3 introduces architectural discontinuity and removes J1850 support - making ST92F124V1TB irreplaceable for legacy J1850-dependent vehicle platforms.
Availability
ST92F124V1TB is available at Aetrix Electronics and suitable for automotive body electronics, door module control, roof systems, and seat memory applications requiring stable component supply and long-term industrial lifecycle support.
Supply support for ST92F124V1TB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in automotive, industrial, and power management ICs with vertical manufacturing and AEC-Q100 qualified product lines.
The ST92Fxx family was designed specifically for cost-sensitive, high-reliability automotive body electronics requiring integrated CAN, J1850, and LIN protocol support - targeting Tier-1 suppliers building BCMs and distributed control units.
FAQ
Does ST92F124V1TB support CAN FD?
No. ST92F124V1TB implements CAN 2.0B only, with bit rates up to 1 Mbps and standard 11-/29-bit identifier support. It lacks CAN FD's flexible data-rate and extended payload capabilities. For CAN FD migration, ST's SPC5 series or newer STM32G4/G7 automotive MCUs are recommended alternatives.
What is the maximum operating temperature for ST92F124V1TB?
The ST92F124V1TB is qualified for industrial temperature range: –40°C to +85°C. It is not AEC-Q100 Grade 1 (–40°C to +125°C) certified. For under-hood applications exceeding +85°C ambient, ST92F150CV1 or ST92F250CV2 variants are specified with extended temperature grading.
Is J1850 BLPD functionality implemented in hardware or firmware?
J1850 BLPD is implemented in dedicated on-die hardware logic, not software-driven UART emulation. This ensures deterministic decoding of GM Class 2 and Ford SCP protocols with guaranteed timing compliance - critical for OEM diagnostic tool interoperability and pass/fail test repeatability.
Can ST92F124V1TB execute code from external memory?
Yes. The External Memory Interface (EXTMI) supports asynchronous 8-bit or 16-bit parallel memory expansion via PORT0, PORT1, and PORT9[7:2], with AS/DS/RW strobes and WAIT signal for glueless connection to SRAM, EPROM, or NAND flash - enabling boot-from-external or overlay code execution scenarios.
ST92F124V1TB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 100-LQFP
- Series:
- ST9
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- ST9
- Core Size:
- 8/16-Bit
- Speed:
- 24MHz
- Connectivity:
- EBI/EMI, I2C, LINbus, SCI, SPI
- Peripherals:
- DMA, LVD, POR, PWM, WDT
- Number of I/O:
- 77
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 1K x 8
- RAM Size:
- 4K x 8
- Voltage - Supply (Vcc/Vdd):
- 4.5V ~ 5.5V
- Data Converters:
- A/D 16x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
ST92F124V1TB FAQ
1.How can I place an order for ST92F124V1TB through Aetrix?
Please submit a Request for Quotation (RFQ) for ST92F124V1TB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ST92F124V1TB reliable?
The price and inventory of ST92F124V1TB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ST92F124V1TB is usually 5 days.
3.What payment methods are accepted for ST92F124V1TB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ST92F124V1TB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ST92F124V1TB?
ST92F124V1TB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ST92F124V1TB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ST92F124V1TB?
For technical support, including ST92F124V1TB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ST92F124V1TB requirements.
6.How does Aetrix verify that ST92F124V1TB is sourced from the original manufacturer or authorized distributors?
All ST92F124V1TB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ST92F124V1TB meets industry standards.
7.What is the process for return or replacement of ST92F124V1TB?
All ST92F124V1TB units undergo pre-shipment inspection (PSI). If there is an issue with ST92F124V1TB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ST92F124V1TB part is unused and in its original packaging.
Return procedure for ST92F124V1TB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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