My Inquiry
My Account
STMicroelectronics STA8090WG
- Part No.:
- STA8090WG
- Manufacturer:
- STMicroelectronics
- Category:
- RF Receivers
- Package:
- 77-UFBGA, WLCSP
- Datasheet:
-
STA8090WG.pdf
- Description:
- FULLY INTEGRATED GPS/GALILEO/GLO
- Quantity:
- Payment:
- Shipping:
Inventory:3,878
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STA8090WG from STMicroelectronics is a fully integrated GNSS System-on-Chip receiver supporting GPS, Galileo, GLONASS, BeiDou, and QZSS with 48 tracking + 2 fast acquisition channels, -162 dBm indoor tracking sensitivity, sub-1-second hot-start TTFF, and embedded ARM946 MCU running at up to 196 MHz - deployed in handheld navigation, sports trackers, and compact data loggers.
For engineers reviewing the STA8090WG datasheet, STA8090WG pinout, STA8090WG application, or STA8090WG equivalent, key selection criteria include multi-constellation RF front-end performance, WLCSP77 package constraints, dual-voltage I/O ring (1.8 V / 3.3 V), integrated SMPS power management, and USB 2.0 full-speed PHY with on-chip transceiver.
Technical Context
The STA8090WG integrates a single-die GNSS baseband processor (G3BB+) with dedicated RF front-end including LNA, VGA, and quadrature down-conversion for GPS/Galileo (1575.42 MHz → 4.092 MHz), GLONASS (1601.718 MHz → 8.57 MHz), and BeiDou (1561.098 MHz → 10.23 MHz), plus a high-performance ARM946E-S core with 256 KB SRAM and real-time clock.
It implements a configurable power architecture with SMPS input (VINM), dual LDOs (VOL1/VOL2), backup supply (VINB), and separate analog/digital/RF voltage domains (VCC, VDD, VDDIO_r1/r2), enabling operation across 1.6–4.3 V main supply while maintaining 1.2 V ±10% RF core and 1.0–1.32 V digital rail compliance.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| GNSS Constellations | GPS, Galileo, GLONASS, BeiDou, QZSS - enables robust positioning in urban canyons via simultaneous multi-system signal acquisition and tracking. |
| Tracking Channels | 48 channels - supports concurrent satellite signal processing across all constellations for high-accuracy PVT solutions. |
| Indoor Sensitivity | -162 dBm (tracking) - allows reliable position lock indoors or under dense foliage using low-noise RF chain and optimized baseband correlation. |
| TTFF (Hot/Cold) | <1 s / 30 s - achieved via fast acquisition engine and embedded ephemeris storage, reducing time-to-first-fix without external assistance. |
| MCU Core | ARM946E-S @ up to 196 MHz - provides real-time navigation computation, firmware execution, and peripheral control without external host processor. |
| Embedded Memory | 256 KB SRAM - accommodates full GNSS firmware stack (acquisition, tracking, navigation, NMEA output) and application buffers in standalone mode. |
| USB Interface | USB 2.0 Full-Speed (12 Mbps) with integrated PHY - enables direct connection to host systems without external transceiver, simplifying BOM and PCB layout. |
| Supply Voltage Range | VINL: 1.6–4.3 V; VDD: 1.0–1.32 V; VDDIO: 1.8 V ±5% or 3.3 V ±10% - supports flexible power design across battery-powered and automotive auxiliary rails. |
Pinout & Package
STA8090WG is housed in a WLCSP77 (3.861 × 3.843 × 0.6 mm, 0.4 mm pitch) package, optimized for ultra-compact GNSS modules. Ball mapping includes dedicated RF, power, timing, communication (UART/I²C/SPI/SQI/USB), and general-purpose GPIO pins with multiple alternate functions.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC_LNA, VCC_RFA, VCC_CHAIN_PLL | Analog RF supply | Independent 1.2 V ±10% supplies for LNA, RF amplifier, and PLL - minimize coupling noise and enable precise RF performance tuning. |
| VINL1/VINL2/VINM/VINB | Power input rails | Separate inputs for LDO1, LDO2, SMPS coil, and backup domain - allow independent sourcing (e.g., battery + supercap) and fault isolation. |
| VDDIO_r1 / VDDIO_r2 | I/O ring supply | Configurable 1.8 V or 3.3 V domains - support mixed-voltage interfaces (e.g., 1.8 V sensor bus + 3.3 V UART) without level shifters. |
| LNA_IN, XTAL_IN, XTAL_OUT | RF & timing interface | Direct connection to antenna and 32.768 kHz crystal - eliminates external matching networks and reduces component count in reference designs. |
| USB_DP / USB_DM | USB physical layer | Full-speed differential pair with integrated transceiver - enables plug-and-play connectivity to PCs, tablets, or embedded hosts without external PHY. |
| SQI_SIO0–SIO3, SQI_CLK, SQI_Cen | Serial Quad I/O | 4-line SPI-compatible flash interface - supports high-speed external firmware storage (e.g., 32 MB SQI Flash) with single-pin read/write capability. |
Key Features
| Feature | Design Value |
|---|---|
| Multi-constellation RF front-end | Integrated LNA, VGA, and quadrature mixer supporting GPS/Galileo/GLONASS/BeiDou/QZSS - eliminates discrete RF components and calibration complexity. |
| Embedded ARM946E-S MCU | 196 MHz operation with 256 KB SRAM - executes full GNSS stack and user applications independently, removing need for external host processor. |
| Power management unit (PMU) | Integrated SMPS + dual LDOs - achieves <25 mW typical active power consumption and extends battery life in portable devices. |
| Dual-voltage I/O rings | VDDIO_r1 (1.8 V / 3.3 V) and VDDIO_r2 (3.3 V) - simplify interface to heterogeneous peripherals (e.g., 1.8 V sensors, 3.3 V displays, legacy UARTs). |
| On-chip USB 2.0 PHY | Full-speed (12 Mbps) transceiver with internal termination - reduces BOM cost and PCB area versus discrete USB PHY solutions. |
| Real-time clock with backup domain | RTC powered by VINB rail and 32.768 kHz crystal - maintains timekeeping during main power loss, critical for timestamped logging and cold-start acceleration. |
Applications
| Handheld Navigation Devices | Sports & Fitness Trackers |
|---|---|
Use Scenario: Compact GPS-enabled hiking or cycling computers requiring accurate position updates under tree cover and urban environments. IC Role / Device Role / Timing Role: Standalone GNSS SoC performing RF reception, baseband processing, PVT calculation, and NMEA output - no external host required. Use Value: 48-channel multi-constellation tracking and -162 dBm sensitivity deliver consistent lock in obstructed areas, reducing positional drift during trail navigation. | Use Scenario: Wearable wristbands capturing location, speed, and elevation during outdoor runs or mountain biking. IC Role / Device Role / Timing Role: Primary positioning engine with integrated RTC and low-power standby mode - enables long battery life and precise activity timestamping. Use Value: Sub-1-second hot-start TTFF and optimized SMPS power delivery extend runtime beyond 24 hours on coin-cell batteries. |
| Data Loggers & Telematics | Asset Tracking Units |
Use Scenario: Industrial field recorders monitoring equipment location, temperature, and motion over extended periods in remote locations. IC Role / Device Role / Timing Role: Autonomous GNSS subsystem interfacing with microcontroller via UART or SQI - handles all satellite signal processing and time-stamped data generation. Use Value: Embedded 256 KB SRAM stores raw measurement data and firmware updates locally, enabling offline operation and reduced host MCU overhead. | Use Scenario: Battery-powered cargo trackers reporting geofence breaches and route deviations via cellular modem. IC Role / Device Role / Timing Role: Low-power positioning co-processor with wake-on-GNSS-event capability - triggers host system only when position change exceeds threshold. Use Value: STDBYn and WAKEUP pins enable <1 µA deep-sleep current, extending 10-year battery life in sealed tracking enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar GNSS receiver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| u-blox UBX-M8030 | 33-channel GPS/GLONASS/Galileo; no embedded ARM core; requires external host for NMEA parsing and logging. | Targeted at host-driven architectures; lacks standalone firmware execution capability. | Select when host MCU handles navigation stack and minimal footprint is secondary to proven field reliability. |
| Qualcomm WGR7640 | Supports GPS/Galileo/BeiDou/QZSS; integrates LTE modem; larger BGA package (10 × 10 mm); higher power consumption. | Designed for connected telematics with integrated cellular - not suitable for pure GNSS-only or ultra-low-power use cases. | Select when simultaneous GNSS + LTE connectivity and cloud upload are mandatory, and size/power budgets permit. |
Compared with UBX-M8030 and WGR7640, STA8090WG uniquely combines multi-constellation GNSS performance, embedded ARM946 processing, and WLCSP77 packaging - making it optimal for space-constrained, hostless, and battery-sensitive applications where autonomous operation and minimal BOM are critical.
Availability
STA8090WG is available at Aetrix Electronics and suitable for handheld navigation devices, sports fitness trackers, industrial data loggers, and asset tracking units requiring stable component supply and long-term lifecycle support.
Supply support for STA8090WG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, sensors, power ICs, and analog/mixed-signal products for industrial, automotive, and consumer markets.
The Teseo III family - including STA8090WG - was engineered specifically for compact, low-power GNSS applications demanding high sensitivity, multi-constellation support, and embedded processing - targeting cost-sensitive portable and wearable electronics.
FAQ
What GNSS constellations does STA8090WG support?
STA8090WG supports GPS (USA), Galileo (EU), GLONASS (Russia), BeiDou (China), and QZSS (Japan) simultaneously. Its 48-channel baseband engine processes signals from all five systems in parallel, improving position accuracy and time-to-first-fix in challenging environments like urban canyons or under dense foliage.
Does STA8090WG require an external flash memory?
Yes - STA8090WG includes an SQI (Serial Quad I/O) interface for connecting external flash memory, typically used to store GNSS firmware, almanac data, and application code. The chip itself contains 256 KB of embedded SRAM but no non-volatile program memory; external SQI Flash is mandatory for full functionality.
Can STA8090WG operate from a single lithium coin cell?
No - while STA8090WG supports wide input voltage (1.6–4.3 V), a standard 3 V coin cell (e.g., CR2032) cannot sustain its peak current demand during RF acquisition (~45 mA). It requires a regulated 1.8 V or 3.3 V supply with ≥100 mA capability, such as a buck-boost converter feeding VINL and VINM rails.
Is the USB interface on STA8090WG compliant with USB 2.0 specifications?
Yes - STA8090WG integrates a full-speed USB 2.0 PHY compliant with USB 2.0 specification (12 Mbps), including on-die termination resistors and differential signaling. It enumerates as a CDC ACM device and supports standard NMEA output over virtual COM port without external transceiver components.
STA8090WG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 77-UFBGA, WLCSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Frequency:
- -
- Sensitivity:
- -162dBm
- Data Rate (Max):
- 12Mbps
- Modulation or Protocol:
- BeiDou, Galileo, GLONASS, GNSS, GPS
- Applications:
- GPS Receiver
- Current - Receiving:
- -
- Data Interface:
- I2C, SPI, UART, USB
- Memory Size:
- 256kB SRAM, 512kB ROM
- Antenna Connector:
- PCB, Surface Mount
- Features:
- -
- Voltage - Supply:
- 1.08V ~ 1.32V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 77-WLCSP (3.86x3.84)
STA8090WG FAQ
1.How can I place an order for STA8090WG through Aetrix?
Please submit a Request for Quotation (RFQ) for STA8090WG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STA8090WG reliable?
The price and inventory of STA8090WG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STA8090WG is usually 5 days.
3.What payment methods are accepted for STA8090WG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STA8090WG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STA8090WG?
STA8090WG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STA8090WG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STA8090WG?
For technical support, including STA8090WG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STA8090WG requirements.
6.How does Aetrix verify that STA8090WG is sourced from the original manufacturer or authorized distributors?
All STA8090WG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STA8090WG meets industry standards.
7.What is the process for return or replacement of STA8090WG?
All STA8090WG units undergo pre-shipment inspection (PSI). If there is an issue with STA8090WG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STA8090WG part is unused and in its original packaging.
Return procedure for STA8090WG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STA8090WG Tags
-
MICRF220AYQS-TR
Microchip Technology
-
SX1239IMLTRT
Semtech Corporation
-
SI4356-B1A-FMR
Silicon Labs
-
SI4362-C2A-GMR
Silicon Labs
-
MAX1473EUI+T
Analog Devices Inc./Maxim Integrated
-
CMX992Q3
CML Micro
-
CMX994AQ4
CML Micro
-
MAX2112ETI+
Analog Devices Inc./Maxim Integrated
-
MAX2112ETI+T
Analog Devices Inc./Maxim Integrated
-
TESEO-LIV3R
STMicroelectronics
-
M20048-1
Antenova
-
CMX994EQ4
CML Micro
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
