STMicroelectronics STEF033PUR

Overview

STEF033PUR from STMicroelectronics is a latching electronic fuse optimized for 3.3 V power rail protection in high-reliability storage systems. It integrates an N-channel MOSFET with 40 mΩ typical R_DS(on) (DFN10 package), 3.6 A continuous current rating, and active protection features including output voltage clamping (4.5 V typ), undervoltage lockout (2.35 V typ), and thermal latch at 160 °C. It is deployed in SSDs and HDD arrays to safeguard downstream circuitry against overcurrent, short-circuit, and overvoltage events.

For engineers reviewing the STEF033PUR datasheet, STEF033PUR pinout, STEF033PUR application, or STEF033PUR equivalent, this page delivers verified electrical parameters, DFN10 package layout, enable/fault interface behavior, soft-start ramp control, and validated alternatives for 3.3 V eFuse replacement in storage and computing platforms.

Technical Context

The STEF033PUR implements a precision current-sensing architecture using an internal Sense FET with fixed ratio to monitor load current via external R_Limit (10–120 Ω), enabling programmable short-circuit (1.35 A typ) and overload (2.5 A) trip points. Its integrated dv/dt control circuit provides a 1.4 ms typical V_OUT ramp-up time without external capacitance.

Thermal protection operates as a latching shutdown at 160 °C junction temperature, signaled by an intermediate voltage (0.8–1.4 V) on the bi-directional Enable/Fault pin. The device remains in open-state until supply cycling or active reset via En/Fault pin pull-down, distinguishing it from auto-retry variants like STEF033APUR.

Key Specifications

Pinout & Package

STEF033PUR is housed in a RoHS-compliant DFN10 (3 × 3 mm) package with exposed VCC pad (B1–B3) and thermal-enhanced bottom-side copper. Pin 10 is GND; pins 1–5 are paralleled V_OUT/Source terminals for low-inductance high-current path; pin 8 serves dual Enable/Fault function.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar electronic fuse applications.

Compared with STEF033APUR, STEF033PUR provides deterministic fault containment essential for storage safety compliance, while TCKE805M0L trades integrated protection for lower bill-of-materials cost and simpler layout-making STEF033PUR optimal for mission-critical 3.3 V rail integrity.

Availability

STEF033PUR is available at Aetrix Electronics and suitable for solid state drives, hard disk drive arrays, and computer motherboard auxiliary power rails requiring stable component supply, long-term lifecycle support, and full production traceability.

Supply support for STEF033PUR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and discrete components for industrial, automotive, and consumer markets.

The STEF series is ST's dedicated electronic fuse product line targeting high-density, high-reliability power distribution in data storage and computing infrastructure-designed specifically to replace mechanical fuses with programmable, resettable, and feature-rich alternatives.

FAQ

What is the recommended R_Limit value to achieve a 2.0 A overload current limit?

Per Figure 12 in the datasheet, a 2.0 A overload current limit corresponds to approximately 30 Ω R_Limit for STEF033PUR. This value is derived from the linear relationship between R_Limit and ILim shown in the "Current limit vs. RLimit" plot. Use 1% tolerance metal-film resistors for consistent trip-point accuracy across temperature.

Can the dv/dt pin be left unconnected without affecting basic eFuse functionality?

Yes-the dv/dt pin may be left open with no impact on current limiting, voltage clamping, or thermal protection. The internal circuit provides a default 1.4 ms V_OUT ramp time. Leaving it unconnected simplifies layout and reduces BOM count while retaining full protection functionality for most 3.3 V rail applications.

How does the Enable/Fault pin behave during a thermal fault event?

During thermal latch activation, the Enable/Fault pin transitions from high-impedance (floating) to a sustained 0.8–1.4 V intermediate voltage level. This state is actively driven-not pulled-and can sink up to 50 µA while signaling fault condition to an external monitoring MCU or daisy-chained eFuses without additional level-shifting circuitry.

Is STEF033PUR compatible with 5 V input rails?

No-STEF033PUR is rated for V_CC = 3.1–8 V maximum, but its output clamping threshold is fixed at 4.5 V. Applying 5 V input would exceed the 4.5 V clamp, causing continuous current limiting and potential thermal shutdown. It is designed exclusively for 3.3 V nominal rails; use STEF050 for 5 V systems.