STMicroelectronics STEF05LPUR

Overview

STEF05LPUR from STMicroelectronics is a latching electronic fuse (eFuse) designed for series protection of 5 V power rails in storage and computing systems. It features 40 mΩ typical R_DS(on) (DFN10 package), 3.6 A continuous current rating, 6.1 V output clamping, thermal latch at 160 °C, and controlled 1.4 ms voltage ramp-up. It protects against overcurrent, short-circuit, overvoltage, and thermal faults in SSDs and HDDs.

For engineers reviewing the STEF05LPUR datasheet, STEF05LPUR pinout, STEF05LPUR application, or STEF05LPUR equivalent, this device requires attention to I-Lim resistor selection (10–120 Ω), dv/dt capacitor configuration (0–1 nF), Enable/Fault pin tri-state behavior, and package-specific thermal resistance (70 °C/W for DFN10).

Technical Context

The STEF05LPUR integrates an N-channel power MOSFET with precision current sensing via an internal sense FET and external R_Limit, enabling programmable short-circuit (0.8–1.6 A) and overload (2.5 A) current limits. Its voltage clamp circuit actively limits V_OUT to ≤6.8 V during input overvoltage events.

It implements dual-mode fault signaling: normal operation (high-impedance or pulled high), disable (low), and thermal fault (0.8–2.0 V intermediate state on EN/Fault). The latching shutdown requires either supply cycling or active EN pin reset-no auto-retry function is present in this variant.

Key Specifications

Pinout & Package

STEF05LPUR is supplied in DFN10 (3 × 3 mm) package with exposed thermal pad (VCC connection). Pin layout is top-view, marking-side up.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar eFuse applications.

Compared with STEF05LAPUR, STEF05LPUR provides deterministic fault isolation without unintended re-engagement; compared with TCKE805M2L, it trades lower R_DS(on) for design flexibility in current threshold, ramp control, and fault signaling granularity.

Availability

STEF05LPUR is available at Aetrix Electronics and suitable for hard disk drives, solid-state drives, and optical disc drive designs requiring stable component supply, long-term lifecycle support, and automotive-grade reliability validation.

Supply support for STEF05LPUR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, MCU, power, and sensor solutions for industrial, automotive, and consumer markets.

The STEF series is ST's dedicated eFuse product line targeting high-reliability 5 V power rail protection in storage subsystems, emphasizing programmability, fault visibility, and thermal robustness over basic overcurrent cutoff.

FAQ

What is the recommended R_Limit value for 2.5 A overload protection?

For 2.5 A overload current limit (I_Lim), ST specifies R_Limit = 24 Ω in the datasheet (Table 6). This value is validated across temperature and process corners for the DFN10 package. Use 1% metal-film resistors with <50 ppm/°C TCR, placed close to Pins 6 and 7 with Kelvin routing to minimize parasitic resistance errors.

Can the dv/dt pin be left unconnected?

Yes - Pin 9 (dv/dt) may be left open for default 1.4 ms ramp time. Leaving it unconnected is electrically safe and commonly used in space-constrained layouts. Adding capacitance extends ramp time linearly (e.g., 470 pF → ~8 ms), but exceeding 1 nF risks excessive startup delay and potential timeout in host power sequencing.

How does the EN/Fault pin indicate thermal shutdown?

During thermal latch, the EN/Fault pin transitions from high-impedance (~3.3 V when pulled up) to a sustained 0.8–2.0 V intermediate voltage (typ. 1.4 V), distinct from enable (≥2.5 V) and disable (≤0.5 V) states. This level is detectable by standard GPIOs and enables direct connection to multiple STEF devices for coordinated shutdown without external logic.

Is the exposed pad electrically connected?

Yes - the exposed thermal pad (VCC) is internally bonded to the positive supply rail and must be soldered to a dedicated copper pour tied to the main 5 V plane. It serves both thermal dissipation (R_thJA = 70 °C/W) and low-inductance power delivery; floating or isolated pads cause thermal runaway and premature shutdown under load.