STMicroelectronics STELPD01PUR

Overview

STELPD01PUR from STMicroelectronics is a latched electronic load switch IC designed for hot-swap and VBUS protection in USB Type-C and USB PD systems. It integrates a 40 mΩ N-channel power FET, provides 17.5 V output overvoltage clamping, supports 5 A continuous current, features adjustable current limiting via RLIM resistor, and includes thermal shutdown at 165 °C. It operates across 4–18 V input and delivers precise fault response in industrial power rail management.

For engineers reviewing the STELPD01PUR datasheet, STELPD01PUR pinout, STELPD01PUR application, or STELPD01PUR equivalent, key selection considerations include its dV/dt-controlled soft-start ramp (500 µs typical), EN/Fault tri-state signaling for fault detection and reset, external gate driver (VG) for reverse-current blocking MOSFET control, and UL2367/IEC 62368-1 safety certification for system-level compliance.

Technical Context

The STELPD01PUR implements a latched fault response with EN/Fault pin driven to an intermediate voltage (750–900 mV) during overcurrent or thermal events, requiring manual reset via EN pull-down or VIN cycling. Its internal charge pump enables gate drive for external reverse-blocking FETs, while the dV/dt pin allows programmable output slew rate using an external capacitor (e.g., 560 pF yields ~1.06 ms ramp).

Overvoltage protection is achieved by active regulation-when VIN exceeds ~17.5 V, the device clamps VOUT by modulating the internal FET's conduction, increasing power dissipation and triggering thermal shutdown under sustained overload. Current limiting uses an external RLIM resistor (e.g., 51 Ω sets ILIM ≈ 3 A), with overload detection latency of 1.5 µs and automatic disconnection of the load path.

Key Specifications

Pinout & Package

STELPD01PUR is housed in a thermally enhanced DFN10L (3 × 3 mm, 0.5 mm pitch) package with exposed center pad for PCB thermal coupling. The pad must be soldered to a dedicated copper pour connected to GND for optimal junction-to-ambient thermal resistance (RthJA = 53 °C/W on 4-layer board).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar electronic load switch applications.

Compared with TCK127G and TPS25982, STELPD01PUR uniquely combines latched fault reporting, UL2367/IEC 62368-1 certification, and dedicated VG pin for reverse-current blocking-making it optimal for safety-critical, USB-C–enabled industrial and automotive systems requiring deterministic fault handling and bidirectional isolation.

Availability

STELPD01PUR is available at Aetrix Electronics and suitable for USB Type-C VBUS management, industrial hot-swap backplanes, and 48 V telecom distribution requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for STELPD01PUR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, microcontrollers, and analog/mixed-signal ICs for industrial, automotive, and consumer markets.

The STELPD01PUR belongs to ST's eFuse and load switch product line, engineered specifically for robust, certified power rail protection in USB PD, hot-swap, and industrial power distribution applications demanding safety, reliability, and design-in simplicity.

FAQ

What is the function of the VG pin, and how is it used in reverse-current protection?

The VG pin is an external gate driver output that controls an external P-channel MOSFET placed in series with the load path. During normal operation, VG rises to ~VIN to turn on the external FET. When VIN drops below UVLO or a fault occurs, VG is actively discharged to rapidly turn off the FET, blocking reverse current flow from VOUT to VIN-critical for USB-C dead-battery scenarios and input power removal.

How does the EN/Fault pin behave during a latched overcurrent event?

During a latched overcurrent event, the EN/Fault pin transitions from its internal 5 V pull-up to a stable intermediate voltage of 750–900 mV, signaling fault status to the host controller. This state persists until reset by either pulling EN/Fault below 2 V (VIL) with an open-drain driver and releasing it, or cycling VIN. It cannot auto-recover.

Can the STELPD01PUR be used without an external RLIM resistor?

No. An RLIM resistor between ILIM and VOUT is mandatory to set the current limit threshold. Omitting or shorting RLIM disables the current-limiting circuit, risking permanent device damage during overload. The datasheet explicitly warns that missing RLIM causes malfunction and may destroy the IC.

What is the maximum allowable input voltage, and what happens if it is exceeded?

The absolute maximum input voltage is 23.5 V. Exceeding this risks permanent damage. Within operational limits (up to 18 V), the device clamps VOUT to ~17.5 V during overvoltage. At VIN > 18 V, clamping increases power dissipation in the internal FET; sustained operation above 18 V may trigger thermal shutdown (165 °C) or cause irreversible junction failure if heatsinking is inadequate.