STMicroelectronics STEVAL-POE001V1

Overview

STEVAL-POE001V1 from STMicroelectronics is a reference design evaluation board for IEEE 802.3bt-compliant Power over Ethernet (PoE) Powered Device (PD) interfaces, integrating the PM8805 system-in-package with dual active bridges, hot-swap MOSFET, and single-signature classification circuitry. It supports up to 100 W via 4-pair power delivery, delivers >97% peak efficiency at 2 A output, and provides open-drain PGD, T0/T1/T2 status signals for PSE identification in industrial PoE-powered switches and LED drivers.

For engineers reviewing the STEVAL-POE001V1 datasheet, STEVAL-POE001V1 pinout, STEVAL-POE001V1 application, or STEVAL-POE001V1 equivalent, key selection considerations include IEEE 802.3bt Class 8 compliance, 40–57 V PoE input range, 2 A VOUT capability, PGD timing (85 ms delay), and T0/T1/T2 signal matrix for PSE type detection in high-power PD interface development.

Technical Context

The STEVAL-POE001V1 implements a complete physical-layer PoE-PD interface using the PM8805 SiP, which embeds two active bridge controllers with integrated gate drivers and charge pump, a 100 V/0.1 Ω high-side hot-swap MOSFET, and IEEE 802.3bt-compliant detection/classification logic. It performs 4-pair cable monitoring and generates T0/T1/T2 outputs to indicate PSE type (standard vs. legacy) and classification success.

Startup includes pre-charge current limiting (~20 mA), followed by DC and overload protection with 1 ms and 10 µs delays respectively. The PGD signal enables downstream DC-DC converters only after UVLO clearance and hot-swap MOSFET turn-on, with an on-board 100 kΩ pull-up to VOUT.

Key Specifications

Availability

STEVAL-POE001V1 is available at Aetrix Electronics and suitable for high-power PoE-powered switches, smart lighting systems, and industrial IoT edge nodes requiring stable component supply and IEEE 802.3bt interoperability validation.

Supply support for STEVAL-POE001V1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, analog ICs, power management devices, and sensors for industrial, automotive, and consumer applications.

The STEVAL-POE001V1 belongs to ST's Power over Ethernet evaluation platform family, engineered to accelerate development of interoperable, high-efficiency 802.3bt-compliant PD interfaces for next-generation powered infrastructure.

FAQ

What is the purpose of the T0, T1, and T2 signals on STEVAL-POE001V1?

The T0, T1, and T2 signals are open-drain outputs that encode PSE identification and classification status per IEEE 802.3bt. Their logic states (e.g., 000 for Class 8) indicate whether the connected PSE is standard or legacy, and whether 4-pair power negotiation succeeded - directly enabling host MCU decision logic without additional decoding.

Can STEVAL-POE001V1 be used with legacy 802.3af/at PSEs?

Yes. The board detects and classifies legacy 802.3af and 802.3at PSEs using the same PM8805 SiP, and reports compatibility via the T0/T1/T2 signal matrix. However, full 100 W operation requires an 802.3bt-compliant PSE; legacy PSEs limit output to their respective power classes (15.4 W or 30 W).

What is the role of the PGD signal, and how should it be interfaced?

PGD is an open-drain enable signal asserted ~85 ms after valid PoE voltage is applied and hot-swap MOSFET is fully on. It must be pulled up externally (100 kΩ to VOUT is onboard); when high, it enables downstream converters. Its timing ensures inrush current is fully managed before load engagement.

Does STEVAL-POE001V1 include output short-circuit protection?

The board implements overload protection with 10 µs response time but is not designed to withstand strong short-circuits on the VOUT/GND terminals. Users must implement external protection (e.g., fuse or eFuse) for robust field operation, as stated in the data brief's safety note.