STMicroelectronics STG3384DTR
- Part No.:
- STG3384DTR
- Manufacturer:
- STMicroelectronics
- Package:
- 10-UFDFN
- Datasheet:
-
STG3384DTR.pdf
- Description:
- IC SW SPST-NOX2 700MOHM 10TDFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,831
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Product details
Overview
STG3384DTR from STMicroelectronics is a dual single-pole single-throw (SPST) analog switch with break-before-make timing, designed for low-voltage portable systems. It operates from 1.65V to 4.3V, delivers ≤0.7Ω on-resistance at 3V/4.3V, supports 4.3V-tolerant 1.8V-compatible control inputs, and achieves ≤25ns turn-off time at 3.6–4.3V - enabling precision signal routing in battery-powered audio and data interfaces.
For engineers reviewing the STG3384DTR datasheet, STG3384DTR pinout, STG3384DTR application, or STG3384DTR equivalent, key selection criteria include guaranteed break-before-make delay (≤15ns), ultra-low ICC (≤0.2µA at 85°C), RON matching (≤0.6Ω ΔRON), ESD robustness (>2kV HBM), and TDFN10 footprint compatibility with space-constrained PCB layouts.
Technical Context
The STG3384 implements two independent CMOS transmission gates using C2MOS process technology, each controlled by dedicated logic-level nIN inputs. Its break-before-make architecture ensures channel isolation during state transitions, preventing momentary shorting between Dn and Sn paths.
It features rail-to-rail analog signal handling (0V to VCC), 4.3V-tolerant digital inputs across full 1.65–4.3V VCC range, and integrated ESD protection on all I/O pins meeting >2kV HBM and >300mA latch-up immunity per JESD17.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65V to 4.3V single supply - enables direct interface with 1.8V/2.5V/3.3V/4.3V logic and analog rails |
| RON (Max) | 0.7Ω at VCC = 3V/4.3V, TA = 25°C - minimizes signal attenuation and voltage drop in low-level analog paths |
| tOFF (Max) | 40ns at VCC = 3.6–4.3V - supports fast switching in USB 1.1, audio multiplexing, and sensor signal routing |
| Break-Before-Make Delay | ≤15ns over full VCC range - prevents transient cross-conduction in dual-channel routing applications |
| ICC (Max) | 0.2µA at TA = 85°C, VIN = 0V - sustains multi-year battery life in always-on portable monitoring circuits |
| ESD Robustness | HBM > 2kV on analog channels vs GND - eliminates need for external ESD diodes in handheld device front-ends |
Pinout & Package
TDFN10 package (2.5mm × 1.3mm, 0.5mm pitch), thermally enhanced, lead-free, ECOPACK® compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | VCC | Positive supply input - powers internal logic and switch transistors; must be decoupled locally |
| 2, 9 | S1, S2 | Switch source terminals - connect to signal sources; high-impedance when OFF, low-RON path when ON |
| 3, 8 | D1, D2 | Common drain terminals - output nodes shared with load or downstream circuitry |
| 4, 7 | NC | No connection - internally unconnected; must remain floating or grounded per layout guidelines |
| 5, 10 | 1IN, 2IN | Digital control inputs - active-high logic; 4.3V-tolerant and 1.8V-compatible across full VCC range |
| 6 | GND | Analog/digital ground reference - shared return path for supply and signal currents |
Key Features
| Feature | Design Value |
|---|---|
| Break-before-make timing | Guaranteed ≤15ns delay prevents signal contention during channel switching in dual-path systems |
| Ultra-low quiescent current | ICC ≤ 0.2µA at 85°C enables use in energy-harvesting and coin-cell-powered devices |
| Low RON flatness | ≤0.21Ω variation over full 0–VCC signal swing - preserves linearity in audio and sensor conditioning |
| High OFF isolation | −90dB @ 100kHz - suppresses crosstalk between adjacent switched signals in multi-channel ADC/DAC interfaces |
| 4.3V-tolerant control inputs | Accepts 1.8V logic while operating down to 1.65V VCC - simplifies level-shifting in mixed-voltage SoC designs |
Applications
| Portable Audio Multiplexer | USB 1.1 Data Line Switching |
|---|---|
Use Scenario: Routing microphone or headset signals between baseband processor and codec in smartphones. IC Role / Device Role / Timing Role: Dual SPST analog switch providing isolated signal paths with break-before-make to prevent pop/click artifacts. Use Value: 0.7Ω RON and −90dB OFF isolation preserve SNR >95dB; 25ns tOFF supports 12MHz audio sample rates. | Use Scenario: Selecting between host and peripheral USB D+/D− lines in OTG-capable mobile devices. IC Role / Device Role / Timing Role: Bidirectional analog switch enabling dynamic USB role reversal without signal degradation. Use Value: 85MHz −3dB bandwidth exceeds USB 1.1's 12MHz requirement; 4.3V-tolerant inputs interface directly with 3.3V GPIOs. |
| Low-Power Sensor Signal Routing | Medical Wearable Front-End |
Use Scenario: Multiplexing outputs from multiple biopotential sensors (ECG, EMG) into a single ADC channel. IC Role / Device Role / Timing Role: Low-leakage analog switch minimizing DC offset drift and preserving small-signal integrity. Use Value: ±100nA IOFF at 4.3V ensures <1µV offset error in 1MΩ sensor impedance paths; 0.2µA ICC extends wearable battery life. | Use Scenario: Isolating patient-connected electrodes from measurement circuitry during calibration or standby. IC Role / Device Role / Timing Role: Safety-critical analog switch with guaranteed break-before-make to prevent simultaneous electrode connection. Use Value: ≤15ns break-before-make delay eliminates risk of transient current paths; >300mA latch-up immunity meets IEC 61000-4-2 requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual SPST analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TS5A23157DRCR | RON = 0.9Ω (max) at 3.3V; no guaranteed break-before-make; tOFF = 45ns (max) | Lacks BbM timing guarantee - unsuitable where channel contention must be avoided | Select only if BbM is not required and higher RON is acceptable in cost-sensitive consumer designs |
| ADG884BRMZ | RON = 0.55Ω (max) at 3V; BbM specified (10ns typ); ICC = 1nA (typ) but not characterized at 85°C | Lower RON and tighter BbM, but lacks 85°C ICC spec - limits use in extended-temperature industrial wearables | Prefer for high-precision medical signal paths where ambient temperature stays <70°C |
Compared with TS5A23157DRCR and ADG884BRMZ, STG3384DTR uniquely combines guaranteed break-before-make timing, 0.2µA max ICC at 85°C, and 4.3V-tolerant 1.8V-compatible control - making it optimal for thermally demanding, safety-critical portable systems requiring deterministic switching behavior.
Availability
STG3384DTR is available at Aetrix Electronics and suitable for portable audio multiplexing, USB OTG switching, low-power sensor routing, and medical wearable front-end designs requiring stable component supply and long-term lifecycle support.
Supply support for STG3384DTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, delivering innovative solutions across automotive, industrial, power, and microcontroller markets.
The STG3384 belongs to ST's low-voltage analog switch product line, engineered specifically for space-constrained, battery-operated portable electronics requiring rail-to-rail signal integrity, ultra-low power, and robust ESD performance.
FAQ
What is the maximum allowable signal voltage swing across S and D pins?
The STG3384DTR supports rail-to-rail analog signals from 0V to VCC. With VCC rated up to 4.3V, the maximum continuous signal voltage is 4.3V peak-to-peak when VCC = 4.3V. Absolute maximum ratings allow −0.5V to VCC + 0.5V transiently, but sustained operation must stay within 0–VCC to avoid increased RON and distortion.
Does STG3384DTR require external pull-up or pull-down resistors on its IN pins?
No. The 1IN and 2IN inputs have CMOS-compatible thresholds and do not require external biasing. VIH is guaranteed ≥0.65×VCC and VIL ≤0.50V across all VCC conditions, ensuring clean logic recognition from standard 1.8V/2.5V/3.3V drivers without added components.
Can STG3384DTR be used in bidirectional signal paths?
Yes. As a passive analog switch fabricated in symmetric C2MOS technology, STG3384DTR supports fully bidirectional signal flow between S and D terminals. Its RON flatness (≤0.21Ω) and low charge injection (≤44pC) ensure minimal distortion regardless of signal direction - confirmed in AC electrical characteristics and analog switch test conditions.
Is the TDFN10 package of STG3384DTR compatible with standard reflow profiles?
Yes. The TDFN10 package is JEDEC-compliant and qualified for standard Pb-free reflow profiles (J-STD-020). Peak temperature tolerance is 260°C for 10 seconds, with thermal pad (exposed die attach) requiring appropriate solder paste volume and stencil design to ensure mechanical reliability and thermal performance.
STG3384DTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Switch Circuit:
- SPST - NO
- Multiplexer/Demultiplexer Circuit:
- 1:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 700mOhm
- Channel-to-Channel Matching (ΔRon):
- 600mOhm
- Voltage - Supply, Single (V+):
- 1.65V ~ 4.3V
- Voltage - Supply, Dual (V±):
- -
- Switch Time (Ton, Toff) (Max):
- 50ns, 30ns
- -3db Bandwidth:
- 85MHz
- Charge Injection:
- 44pC
- Channel Capacitance (CS(off), CD(off)):
- 5pF
- Current - Leakage (IS(off)) (Max):
- 10nA
- Crosstalk:
- -76dB @ 100kHz
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-TDFN (2.5x1.3)
STG3384DTR FAQ
1.How can I place an order for STG3384DTR through Aetrix?
Please submit a Request for Quotation (RFQ) for STG3384DTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STG3384DTR reliable?
The price and inventory of STG3384DTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STG3384DTR is usually 5 days.
3.What payment methods are accepted for STG3384DTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STG3384DTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STG3384DTR?
STG3384DTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STG3384DTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STG3384DTR?
For technical support, including STG3384DTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STG3384DTR requirements.
6.How does Aetrix verify that STG3384DTR is sourced from the original manufacturer or authorized distributors?
All STG3384DTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STG3384DTR meets industry standards.
7.What is the process for return or replacement of STG3384DTR?
All STG3384DTR units undergo pre-shipment inspection (PSI). If there is an issue with STG3384DTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STG3384DTR part is unused and in its original packaging.
Return procedure for STG3384DTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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