STMicroelectronics STGAP1STR
- Part No.:
- STGAP1STR
- Manufacturer:
- STMicroelectronics
- Category:
- Isolators - Gate Drivers
- Package:
- 24-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
STGAP1STR.pdf
- Description:
- DGTL ISO 2.5KV 1CH GATE DVR 24SO
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
STGAP1STR from STMicroelectronics is a galvanically isolated single-channel gate driver IC for N-channel MOSFETs and IGBTs, qualified per AEC-Q100 for automotive use. It delivers 5 A sink/source peak output current, supports up to 1500 V high-voltage rail, achieves ≤100 ns input-to-output propagation delay, and integrates desaturation detection, active Miller clamp, and SPI-configurable protection features - enabling robust motor control in EV inverters and industrial drives.
For engineers reviewing the STGAP1STR datasheet, STGAP1STR pinout, STGAP1STR application, or STGAP1STR equivalent, key selection considerations include its 5 A drive strength, ±50 V/ns dV/dt immunity across –40 °C to 125 °C, dual-level turn-off capability, programmable deadtime with violation detection, and integrated diagnostic status reporting via open-drain output and SPI register access.
Technical Context
The STGAP1STR employs true galvanic isolation between low-voltage control logic and high-voltage floating output stage, using capacitive isolation technology compliant with IEC 60747-5-2 and UL 1577 (5 kVRMS reinforced isolation). Its architecture separates GON and GOFF terminals for independent gate control and supports negative gate drive via VL supply.
Protection is implemented at both hardware and firmware levels: desaturation detection triggers within 100 ns of overcurrent onset; VCE active clamping limits voltage spikes during switching; SENSE input enables external shunt-based overcurrent monitoring; and self-diagnostic routines verify Miller clamp path integrity, DESAT comparator function, and SENSE resistor connection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Voltage | 5 kVRMS reinforced isolation per UL 1577 - enables safe operation in 1200 V DC-link systems with creepage/clearance compliance. |
| Peak Output Current | 5 A sink/source at 25 °C - sufficient to drive high-gate-charge IGBTs (e.g., 1200 V/300 A) without external buffers. |
| Propagation Delay | ≤100 ns max - ensures precise PWM timing alignment in high-frequency (≥20 kHz) inverter control loops. |
| dV/dt Immunity | ±50 V/ns across full temperature range - prevents false triggering during fast-switching transients in SiC or GaN-based topologies. |
| Desat Detection Time | <100 ns response - enables sub-microsecond fault shutdown before IGBT latch-up or thermal runaway. |
| SPI Interface | 4-wire full-duplex with CRC protection - allows runtime reconfiguration of deadtime, deglitch filters, and protection thresholds without hardware changes. |
| Thermal Protection | Programmable warning & shutdown thresholds - provides early overtemperature indication and hard cutoff at junction temperatures exceeding 150 °C. |
Pinout & Package
STGAP1STR is housed in a SO24W (wide-body SOIC-24) package with 1.27 mm pitch, optimized for high-voltage creepage (≥8.3 mm) and thermal performance in automotive and industrial environments.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Low-side logic supply | 3.3 V regulated input powering control logic, SPI interface, and diagnostic registers. |
| GND | Low-side ground reference | Return path for VDD and digital inputs; isolated from high-side ground (GNDISO). |
| IN+ | Digital input (active-high) | Primary PWM input; accepts 3.3 V CMOS levels; filtered by programmable deglitch circuit. |
| IN-/DIAG2 | Configurable dual-function terminal | Either inverted input or diagnostic status output (open-drain), selectable via CFG1 register. |
| SD | Hardware fault reset | Asynchronous stop command input; forces immediate gate turn-off and clears fault latches. |
| VH | High-side floating supply | Connects to bootstrap or isolated DC-DC output; powers gate driver stage up to 1500 V potential. |
| VL | Negative gate supply rail | Enables negative gate drive (e.g., –5 V) to improve noise immunity and prevent spurious turn-on. |
| GNDISO | Floating ground reference | Isolated return for VH/VL; forms galvanic barrier between control and power domains. |
| GON | Gate drive output (source) | Active-high output driving gate toward VH; rated for 5 A source current. |
| GOFF | Gate drive output (sink) | Active-low output pulling gate toward VL/GNDISO; rated for 5 A sink current. |
| SENSE | Overcurrent sense input | Analog input for external shunt resistor; compares against programmable threshold (0.2–1.2 V) for fast OCP. |
| DESAT | Desaturation detection input | Connects to IGBT collector via RC network; detects VCE rise indicating short-circuit or overload. |
| VCECLAMP | VCE clamping control | Activates internal clamp transistor to limit VCE during desat events, reducing stress on IGBT. |
| CLAMP | Miller clamp enable | Forces gate to VL during off-state to suppress Miller-induced turn-on in half-bridge configurations. |
| ASC | Asynchronous stop command | Alternative hardware fault input; identical function to SD but mapped to different register bit. |
| SDO | SPI data output | Serial output for reading STATUS and DIAG registers; includes CRC-protected frame format. |
| SDI | SPI data input | Serial input for writing configuration registers; supports daisy-chaining multiple devices. |
| CS | SPI chip select | Active-low enable for SPI communication; synchronous with SCK clock. |
| SCK | SPI clock | Up to 10 MHz clock input; defines timing for register read/write operations. |
| DIAG1 | Diagnostic status output | Open-drain output reflecting combined fault status (desat, overtemp, UVLO, etc.) per STATUS1 bits. |
Key Features
| Feature | Design Value |
|---|---|
| Galvanic Isolation | Capacitive isolation with 5 kVRMS rating and >100-year lifetime - eliminates need for optocouplers and associated timing skew. |
| Programmable Deadtime | Configurable 0–2 µs deadtime with hardware violation detection - prevents shoot-through in half-bridge without MCU intervention. |
| 2-Level Turn-Off (2LTO) | Two-stage gate discharge (fast then slow) - reduces EMI during fault shutdown while maintaining safe dv/dt. |
| Self-Diagnostic Routines | On-chip verification of Miller clamp path, DESAT comparator, and SENSE resistor continuity - enables ASIL-B-compliant functional safety validation. |
| VCE Active Clamping | Integrated clamp transistor triggered by DESAT event - limits VCE to safe level without external components, improving system reliability. |
Applications
| EV Traction Inverter | Solar String Inverter |
|---|---|
Use Scenario: Driving 1200 V IGBT modules in 3-phase motor inverter for battery electric vehicles. IC Role / Device Role / Timing Role: Isolated gate driver providing rail-to-rail 5 A drive, desat protection, and SPI-configurable deadtime for precise PWM control. Use Value: Enables AEC-Q100-compliant, high-reliability motor control with <100 ns timing accuracy and sub-100 ns fault response. | Use Scenario: Controlling high-voltage SiC MOSFETs in unidirectional DC/AC conversion stage of residential solar inverters. IC Role / Device Role / Timing Role: Galvanically isolated driver supporting negative gate bias and dV/dt immunity for fast-switching SiC devices. Use Value: Reduces EMI through 2-level turn-off and maintains stability under ±50 V/ns common-mode transients typical in PV string environments. |
| Industrial AC Drive | EV DC Fast Charging Station |
Use Scenario: Gate driving IGBTs in variable-frequency drives for HVAC compressors and pumps. IC Role / Device Role / Timing Role: Single-channel isolated driver with integrated UVLO/OVLO, thermal warning, and diagnostic outputs for predictive maintenance. Use Value: Eliminates external protection circuitry and simplifies BOM while meeting IEC 61800-5-1 insulation requirements. | Use Scenario: Controlling bidirectional IGBT stacks in liquid-cooled 150 kW+ charging modules. IC Role / Device Role / Timing Role: High-voltage isolated driver with 1500 V rail support, active Miller clamp, and SPI-accessible fault logs for remote diagnostics. Use Value: Ensures safe operation under high dv/dt conditions during rapid charge/discharge cycles and enables firmware-updatable protection thresholds. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si827x (Silicon Labs) | Higher dV/dt immunity (100 V/ns), no integrated VCE clamping or SENSE input; uses transformer isolation. | Lacks desat detection and active clamping - requires external comparators and clamping circuits for IGBT protection. | Preferred where ultra-high noise immunity is critical and external protection can be added; not drop-in for STGAP1STR's integrated safety functions. |
| UCC5390 (Texas Instruments) | 4 A peak drive, no SPI interface, fixed deadtime; includes basic Miller clamp and desat detection but no 2LTO or VCE clamping. | Requires external deadtime generation and lacks configurable diagnostics - less suitable for ASIL-B systems requiring traceable fault logging. | Better for cost-sensitive industrial drives without functional safety requirements; cannot replace STGAP1STR's programmable protection stack. |
Compared with Si827x and UCC5390, STGAP1STR uniquely combines 5 A drive strength, SPI-configurable protection parameters, VCE active clamping, and 2-level turn-off - making it the only option among the three that satisfies full ASIL-B diagnostic coverage for automotive traction inverters without external components.
Availability
STGAP1STR is available at Aetrix Electronics and suitable for EV traction inverters, solar string inverters, industrial AC drives, and EV DC fast charging stations requiring stable component supply, long-term lifecycle assurance, and automotive-grade reliability.
Supply support for STGAP1STR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and analog products for automotive, industrial, and consumer markets.
The STGAP1STR belongs to ST's gapDRIVE™ family of isolated gate drivers, engineered specifically for high-reliability motor control in AEC-Q100-compliant automotive and industrial applications demanding integrated protection, configurability, and functional safety support.
FAQ
What is the maximum operating voltage for the VH rail?
The STGAP1STR supports a high-voltage rail (VH) up to 1500 V relative to GNDISO. This rating is validated per IEC 60747-5-2 and UL 1577 standards, enabling direct use in 1200 V IGBT-based inverters with margin for transient overvoltage. The device maintains full dV/dt immunity and isolation integrity across this range.
Does STGAP1STR support negative gate voltage drive?
Yes. The STGAP1STR supports negative gate drive via the VL terminal, which can be biased below GNDISO (e.g., –5 V) to enhance noise immunity and prevent spurious turn-on in high-dV/dt environments. The GOFF output actively sinks current to VL, and CLAMP functionality pulls the gate to VL during off-state.
How does the 2-level turn-off (2LTO) function improve system reliability?
2LTO implements two-stage gate discharge during fault conditions: an initial fast discharge reduces current rapidly, followed by slower discharge to limit dv/dt and suppress voltage overshoot. This minimizes EMI, avoids secondary breakdown in IGBTs, and extends device lifetime - especially critical in high-power EV inverters where repeated fault events occur.
Can STGAP1STR be used without SPI configuration?
Yes. STGAP1STR operates with factory-default protection settings (e.g., deadtime = 500 ns, DESAT threshold = 0.5 V) and requires no SPI initialization for basic gate driving. SPI is optional for tuning protection thresholds, enabling diagnostics, or adapting to specific IGBT characteristics - all safety-critical functions remain active by default.
STGAP1STR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- gapDRIVE™
- Package/Case:
- 24-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Technology:
- Magnetic Coupling
- Number of Channels:
- 1
- Voltage - Isolation:
- 2500Vrms
- Common Mode Transient Immunity (Min):
- -
- Propagation Delay tpLH / tpHL (Max):
- 130ns, 130ns
- Pulse Width Distortion (Max):
- 10ns
- Rise / Fall Time (Typ):
- 25ns, 25ns (Max)
- Current - Output High, Low:
- 2.5A, 2.5A
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- 4.5V ~ 36V
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-SO
- Approval Agency:
- UL
STGAP1STR FAQ
1.How can I place an order for STGAP1STR through Aetrix?
Please submit a Request for Quotation (RFQ) for STGAP1STR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STGAP1STR reliable?
The price and inventory of STGAP1STR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STGAP1STR is usually 5 days.
3.What payment methods are accepted for STGAP1STR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STGAP1STR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STGAP1STR?
STGAP1STR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STGAP1STR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STGAP1STR?
For technical support, including STGAP1STR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STGAP1STR requirements.
6.How does Aetrix verify that STGAP1STR is sourced from the original manufacturer or authorized distributors?
All STGAP1STR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STGAP1STR meets industry standards.
7.What is the process for return or replacement of STGAP1STR?
All STGAP1STR units undergo pre-shipment inspection (PSI). If there is an issue with STGAP1STR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STGAP1STR part is unused and in its original packaging.
Return procedure for STGAP1STR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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