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STMicroelectronics STGAP2HSMTR
- Part No.:
- STGAP2HSMTR
- Manufacturer:
- STMicroelectronics
- Category:
- Isolators - Gate Drivers
- Package:
- 8-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
STGAP2HSMTR.pdf
- Description:
- DIGITAL ISO 5KV 1CH GATE DVR 8SO
- Quantity:
- Payment:
- Shipping:
Inventory:717
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Product details
Overview
STGAP2HSMTR from STMicroelectronics is a galvanically isolated 4 A single-channel gate driver IC for high-side and half-bridge power stage control in industrial inverters and motor drives. It delivers rail-to-rail output, 75 ns input-output propagation delay, 100 V/ns CMTI, and integrated UVLO, thermal shutdown, and standby mode - enabling robust switching of 600 V/1200 V IGBTs and MOSFETs in UPS, PFC, and induction heating systems.
For engineers reviewing the STGAP2HSMTR datasheet, STGAP2HSMTR pinout, STGAP2HSMTR application, or STGAP2HSMTR equivalent, key selection criteria include isolation rating (3.5 kVRMS), Miller clamp capability, separate sink/source configuration flexibility, TTL/CMOS-compatible 3.3 V/5 V inputs with hysteresis, and SO-8W wide-body package suitability for high-voltage PCB layouts.
Technical Context
The STGAP2HSMTR implements dual-input logic control (IN+, IN−) with deglitch filtering and hardware interlocking to prevent cross-conduction, supporting both unipolar and bipolar gate driving topologies. Its isolated floating section features independent VH supply (up to 26 V) referenced to GNDISO, with dedicated UVLO thresholds (VHon = 9.1 V typ., VHoff = 8.4 V typ.) and hysteresis (750 mV typ.).
Two functional configurations are supported: one with single GOUT + CLAMP pin for Miller spike suppression in half-bridges, and another with separated GON/GOFF outputs for independent turn-on/turn-off resistor tuning. Both use the same SO-8W package and share identical isolation certification (IEC 60747-17, UL 1577), safety ratings (VIORM = 1.2 kVPEAK, VIOTM = 5.0 kVPEAK), and thermal derating behavior (Rth(JA) = 120 °C/W).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Drive Current | 4 A sink/source at 25°C - enables direct drive of high-gate-charge IGBTs/MOSFETs without external buffers |
| Propagation Delay | 75 ns max - ensures precise PWM timing alignment in high-frequency (≤1 MHz) switching applications |
| CMTI | 100 V/ns - maintains signal integrity under fast dv/dt transients in noisy industrial environments |
| Isolation Voltage | 3.5 kVRMS (60 s) - certified per UL 1577 and IEC 60747-17 for reinforced insulation in mains-connected systems |
| UVLO Threshold | VHon = 9.1 V, VHoff = 8.4 V - prevents erratic gate switching during brown-out conditions on the isolated side |
| Miller Clamp Threshold | VCLAMPth = 2.0 V typ. - actively clamps gate voltage below threshold to suppress false turn-on in half-bridge legs |
| Standby Quiescent Current | IQDDSBY = 65 µA, IQHSBY = 550 µA - reduces idle power consumption in energy-sensitive systems |
Pinout & Package
STGAP2HSMTR is housed in a wide-body SO-8W package (8-pin, 7.5 mm body width, creepage/clearance ≥8 mm), optimized for high-voltage isolation and thermal performance (Rth(JA) = 120 °C/W). The device supports two pinout variants: "Separate Outputs" (GON/GOFF) and "Single Output + CLAMP" (GOUT/CLAMP); STGAP2HSMTR uses the latter configuration.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VDD | Logic Supply Input | 5 V tolerant supply for low-side control circuitry; requires local 100 nF + 1–10 µF bypassing |
| 2 IN+ | Active-High Logic Input | Enables GOUT high when IN− is low; supports TTL/CMOS levels with 0.66·VDD threshold |
| 3 IN− | Active-Low Logic Input | Enables GOUT low when IN+ is low; used with IN+ for HW interlock and deglitched noise immunity |
| 4 GND | Logic Ground Reference | Return path for VDD and logic inputs; must be separated from GNDISO to maintain isolation barrier |
| 5 VH | High-Side Gate Supply | Up to 26 V positive supply for gate driver output stage; UVLO monitored independently |
| 6 GOUT | Rail-to-Rail Output | Sink/source driver output referenced to GNDISO; capable of 4 A peak into capacitive loads |
| 7 CLAMP | Miller Clamp Control | Active-low clamp output triggered at VCLAMPth = 2.0 V; provides low-impedance path to GNDISO |
| 8 GNDISO | Isolated Ground Reference | Return path for VH and GOUT/CLAMP; electrically isolated from GND by certified 3.5 kVRMS barrier |
Key Features
| Feature | Design Value |
|---|---|
| Dual-input logic with deglitch filter | 20–40 ns input noise rejection prevents spurious switching during EMI events |
| Configurable Miller Clamp | Clamps gate voltage below 2.0 V to eliminate Miller-induced false turn-on in half-bridge topologies |
| Thermal shutdown protection | Triggers at TJ = 170 °C with 20 °C hysteresis - forces safe state until junction cools |
| Hardware interlock via IN+/IN− | Truth table disables simultaneous high states, preventing shoot-through during controller faults |
| Low-power standby mode | Enters after 280 µs of IN+ = IN− = HIGH; exits with precise timing sequence to avoid glitches |
Applications
| Industrial Motor Drives | Uninterruptible Power Supplies (UPS) |
|---|---|
|
Use Scenario: Driving high-voltage IGBT half-bridges in variable-speed drives for HVAC compressors and conveyor systems. IC Role / Device Role / Timing Role: Isolated gate driver providing 4 A peak current and 75 ns propagation delay to ensure synchronized, shoot-through-free switching. Use Value: Enables compact inverter design with reduced external component count via integrated UVLO, Miller clamp, and standby function. |
Use Scenario: Controlling bidirectional DC-AC and AC-DC stages in online double-conversion UPS systems. IC Role / Device Role / Timing Role: Galvanically isolated driver for high-side switches in H-bridge and three-phase inverter legs, maintaining timing accuracy under load transients. Use Value: 100 V/ns CMTI and 3.5 kVRMS isolation ensure reliable operation in grounded-neutral mains environments with high common-mode noise. |
| Power Factor Correction (PFC) | Induction Heating Systems |
|
Use Scenario: Driving boost switch in continuous conduction mode (CCM) PFC front-ends for server PSUs and industrial SMPS. IC Role / Device Role / Timing Role: High-current gate driver with fast turn-on/turn-off and low propagation delay skew for tight current-loop control. Use Value: Separate GON/GOFF option (in alternate variant) allows independent optimization of rise/fall times to minimize switching losses. |
Use Scenario: Gate-driving resonant half-bridge inverters operating at 20–100 kHz for cooktop and industrial heating coils. IC Role / Device Role / Timing Role: Isolated driver with Miller clamp preventing parasitic turn-on during zero-voltage switching transitions. Use Value: Integrated thermal shutdown protects against coil detuning or cooling failure, forcing safe state before die overheating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8271BD-IS | 2.5 A output, 125 V/ns CMTI, 5 kVRMS isolation, no Miller clamp, 8-pin SOIC | Lacks dedicated Miller clamp and separate sink/source configuration; suited for lower-power, cost-sensitive designs | Choose when 2.5 A drive suffices and board space favors standard SOIC over SO-8W |
| UCC5350MCDWVR | 4 A output, 100 V/ns CMTI, 5 kVRMS isolation, integrated Miller clamp, 8-pin SOIC | Uses different input logic (single-input with polarity select), lacks dual-input interlock and standby mode | Prefer when TI ecosystem compatibility or higher isolation margin (5 kVRMS) is prioritized over hardware interlock |
Compared with Si8271BD-IS and UCC5350MCDWVR, STGAP2HSMTR uniquely combines 4 A drive, dual-input interlock, Miller clamp, and standby mode in a single SO-8W package - making it optimal for high-reliability industrial inverters requiring fault resilience and power efficiency.
Availability
STGAP2HSMTR is available at Aetrix Electronics and suitable for industrial motor drives, uninterruptible power supplies, and induction heating systems requiring stable component supply, long-term lifecycle support, and certified galvanic isolation.
Supply support for STGAP2HSMTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and analog components for industrial, automotive, and consumer markets.
STGAP2HSMTR belongs to ST's STGAP family of isolated gate drivers, engineered specifically for high-reliability, high-voltage power conversion systems where safety, noise immunity, and thermal robustness are critical.
FAQ
What is the maximum gate drive voltage supported by STGAP2HSMTR?
The STGAP2HSMTR supports a maximum gate drive supply voltage (VH) of 26 V referenced to GNDISO. This rail-to-rail output capability allows direct drive of IGBTs and MOSFETs requiring high gate voltages, while its internal UVLO circuit ensures safe operation only when VH exceeds 9.1 V (typical turn-on threshold) and remains above 8.4 V (typical turn-off threshold).
Does STGAP2HSMTR support both high-side and low-side gate driving configurations?
STGAP2HSMTR is designed as a single-channel isolated gate driver optimized for high-side or floating half-bridge applications. It references its output (GOUT/CLAMP) to GNDISO, enabling direct connection to the source/emitter of high-side switches. For low-side driving, a non-isolated driver or complementary channel would be required - STGAP2HSMTR itself does not support ground-referenced low-side operation.
How does the Miller clamp function operate, and what external components are needed?
The Miller clamp activates when the CLAMP pin detects gate voltage falling below VCLAMPth (2.0 V typ.), creating a low-impedance path from GOUT to GNDISO. No external components are required - the clamp is fully integrated. It operates automatically during turn-off in half-bridge configurations to suppress dv/dt-induced false turn-on, eliminating need for external diodes or resistors in the gate loop.
Can STGAP2HSMTR be used in 1200 V inverter designs?
Yes - STGAP2HSMTR is rated for VIORM = 1.2 kVPEAK and VIOTM = 5.0 kVPEAK, meeting IEC 60747-17 and UL 1577 requirements for reinforced insulation in 1200 V systems. Its 100 V/ns CMTI and thermal shutdown (170 °C) further support reliable operation in high-voltage inverters, provided PCB layout follows ST's guidelines for creepage (≥8 mm) and isolation barrier integrity.
STGAP2HSMTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Number of Channels:
- 1
- Voltage - Isolation:
- 5000Vrms
- Common Mode Transient Immunity (Min):
- 100V/ns
- Propagation Delay tpLH / tpHL (Max):
- 90ns, 90ns
- Pulse Width Distortion (Max):
- 20ns
- Rise / Fall Time (Typ):
- 30ns, 30ns
- Current - Output High, Low:
- 4A, 4A
- Current - Peak Output:
- 4A
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- 3V ~ 5.5V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SO
- Approval Agency:
- UL
STGAP2HSMTR FAQ
1.How can I place an order for STGAP2HSMTR through Aetrix?
Please submit a Request for Quotation (RFQ) for STGAP2HSMTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STGAP2HSMTR reliable?
The price and inventory of STGAP2HSMTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STGAP2HSMTR is usually 5 days.
3.What payment methods are accepted for STGAP2HSMTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STGAP2HSMTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STGAP2HSMTR?
STGAP2HSMTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STGAP2HSMTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STGAP2HSMTR?
For technical support, including STGAP2HSMTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STGAP2HSMTR requirements.
6.How does Aetrix verify that STGAP2HSMTR is sourced from the original manufacturer or authorized distributors?
All STGAP2HSMTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STGAP2HSMTR meets industry standards.
7.What is the process for return or replacement of STGAP2HSMTR?
All STGAP2HSMTR units undergo pre-shipment inspection (PSI). If there is an issue with STGAP2HSMTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STGAP2HSMTR part is unused and in its original packaging.
Return procedure for STGAP2HSMTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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