STMicroelectronics STGAP2SICSTR

Overview

STGAP2SICSTR from STMicroelectronics is a galvanically isolated 4 A single-channel SiC MOSFET gate driver in wide-body SO-8W package, featuring 100 V/ns CMTI, 75 ns max input-output propagation delay, and dual-input logic with hysteresis for hardware interlocking. It supports both separated-sink/source (GON/GOFF) and Miller-clamp (GOUT/CLAMP) configurations for half-bridge SiC inverter stages in industrial motor drives and UPS systems.

For engineers reviewing the STGAP2SICSTR datasheet, STGAP2SICSTR pinout, STGAP2SICSTR application, or STGAP2SICSTR equivalent, key selection criteria include SiC-optimized UVLO thresholds (14.6–16.4 V turn-on), thermal shutdown at 170°C, standby quiescent current as low as 400 µA on VH, and IEC 60747-17 / UL 1577 certified isolation up to 3.5 kVRMS.

Technical Context

The device implements dual isolated power domains: logic side (VDD/GND) and floating gate-drive side (VH/GNDISO), with level-shifting across a reinforced dielectric barrier. Its dual-input architecture enables active hardware interlock-preventing cross-conduction by forcing GOFF ON when both IN+ and IN- are low, regardless of controller state.

Two functional variants are supported via pin configuration: one with separate GON/GOFF outputs for independent gate resistor tuning, and another with GOUT + CLAMP for active Miller clamping during high-dV/dt commutation. Both share identical UVLO (14.6–16.4 V turn-on), thermal shutdown (170°C), and 4 A sink/source capability at 25°C.

Key Specifications

Pinout & Package

Package: Wide-body SO-8W (8-pin, 5.9 mm × 4.9 mm, creepage/clearance ≥8 mm), IEC 60747-17 certified for basic insulation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar SiC gate driver applications.

Compared with Si827x and UCC5870-Q1, STGAP2SICSTR delivers optimal balance of 4 A drive, integrated Miller clamp, standby power savings, and SO-8W compactness-making it the preferred choice for cost-sensitive, high-reliability industrial SiC inverters where board space and thermal margin are constrained.

Availability

STGAP2SICSTR is available at Aetrix Electronics and suitable for industrial motor drives, UPS systems, and SiC-based DC-DC converters requiring stable component supply, long lifecycle support, and certified galvanic isolation.

Supply support for STGAP2SICSTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in power management, analog, MEMS, and microcontrollers for industrial, automotive, and consumer markets.

STGAP2SICSTR belongs to ST's STGAP family of reinforced-isolation gate drivers, designed specifically for robust, high-efficiency SiC and GaN power conversion in harsh industrial environments.

FAQ

What is the purpose of the CLAMP pin in STGAP2SICSTR?

The CLAMP pin provides active Miller current suppression during high-dV/dt switching events in half-bridge topologies. When the external SiC MOSFET's gate voltage falls below 1.3–2.6 V (V_CLAMPth), the internal clamp switch turns on, creating a low-impedance path from gate to GNDISO. This prevents unintended turn-on caused by capacitive coupling through the Miller capacitance (C_GD) when the complementary switch commutates.

How does the dual-input (IN+/IN−) architecture improve system reliability?

The IN+/IN− inputs implement hardware interlocking: when both pins are low, GOFF is forced ON and GON is placed in high-impedance-regardless of MCU state. This eliminates shoot-through risk during controller lockup, reset, or firmware crash. The truth table also allows polarity inversion and enables safe-state entry without software intervention, meeting IEC 61800-5-2 functional safety requirements.

Can STGAP2SICSTR drive both SiC and silicon MOSFETs?

Yes-STGAP2SICSTR is compatible with both SiC and Si MOSFETs. Its 4 A sink/source capability, 26 V gate drive range, and rail-to-rail outputs suit high-speed SiC devices (e.g., 100 nC gate charge), while its 3.3 V/5 V TTL/CMOS inputs and 75 ns propagation delay also support standard Si MOSFETs in lower-frequency industrial applications like motor starters and power supplies.

What isolation certifications apply to STGAP2SICSTR?

STGAP2SICSTR is certified to IEC 60747-17 (VDE 0884-17) for reinforced galvanic isolation and recognized under UL 1577. It achieves V_ISO = 3.5 kV_RMS, V_IORM = 1.2 kV_PEAK, and V_IOTM = 5.0 kV_PEAK, with 8 mm creepage/clearance and CTI ≥400 V. These ratings meet industrial safety standards for 600–1200 V systems including IEC 61800-5-1 and UL 61800-5-1.