STMicroelectronics STGAP2SMTR
- Part No.:
- STGAP2SMTR
- Manufacturer:
- STMicroelectronics
- Category:
- Isolators - Gate Drivers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
STGAP2SMTR.pdf
- Description:
- DGTL ISO 1.7KV 1CH GATE DVR 8SO
- Quantity:
- Payment:

- Shipping:

Inventory:6,548
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Product details
Overview
STGAP2SMTR from STMicroelectronics is a galvanically isolated 4 A single-channel gate driver IC for high-voltage IGBT and MOSFET power stages, featuring separated GON/GOFF outputs, 75 ns propagation delay, 100 V/ns CMTI, and rail-to-rail 26 V gate drive capability - deployed in industrial motor inverters, UPS systems, and PFC modules.
For engineers reviewing the STGAP2SMTR datasheet, STGAP2SMTR pinout, STGAP2SMTR application, or STGAP2SMTR equivalent, key selection criteria include isolated high-side gate drive configuration, UVLO thresholds (8.6–9.6 V on VH), thermal shutdown (170 °C), standby current (400 µA on VH), and SO-8 package compatibility with 4 mm creepage/clearance for 1700 V systems.
Technical Context
The STGAP2SMTR implements dual-input logic control (IN+/IN−) with deglitch filtering (20–40 ns), enabling hardware interlocking to prevent cross-conduction in half-bridge topologies. Its isolated floating section supports unipolar or bipolar gate driving via separate source (GON) and sink (GOFF) outputs.
It integrates VH-supply UVLO with 0.75 V hysteresis, temperature shutdown at 170 °C with 20 °C hysteresis, and a standby mode entered by holding both inputs high for ≥280 µs - reducing VDD and VH quiescent currents to 65 µA and 550 µA respectively while forcing GOFF active and GON high-impedance.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VH Supply Range | 9.6–26 V - enables direct drive of 1200 V IGBTs with sufficient gate overdrive margin |
| Output Current | 4 A sink/source - supports fast switching of high-Qg power devices up to 1 MHz |
| CMTI | 100 V/ns - ensures noise immunity during high-dV/dt commutation in 600–1700 V systems |
| Propagation Delay | 75 ns typ. - delivers precise PWM timing alignment for synchronous rectification and phase-shifted topologies |
| UVLO Threshold | VHon = 9.1 V, VHoff = 8.4 V - prevents erratic gate behavior during brown-out conditions |
| Thermal Shutdown | 170 °C with 20 °C hysteresis - protects against sustained overload or poor heatsinking in enclosed drives |
| Standby Current | IQHSBY = 550 µA @ VH - reduces idle power in battery-backed or energy-sensitive systems |
Pinout & Package
Narrow-body SO-8 package with reinforced galvanic isolation (4 mm creepage/clearance), UL 1577 recognized (E362869), and 123 °C/W junction-to-ambient thermal resistance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VDD | Logic supply input | 5 V tolerant TTL/CMOS interface supply; powers internal control logic and input buffers |
| 2 IN+ | Active-high logic input | Enables GON when high and GOFF low per truth table; deglitched to reject <20 ns noise |
| 3 IN− | Active-low logic input | Complements IN+ for HW interlock; forces safe state if both inputs high (standby entry) |
| 4 GND | Logic ground reference | Return path for VDD and logic inputs; must be star-connected to minimize ground bounce |
| 5 VH | High-side gate drive supply | Connects to isolated DC bus (e.g., 15–20 V); powers output stage and enables rail-to-rail drive |
| 6 GON | Source output terminal | Drives gate high with 4 A peak; RDS_ON = 1.125 Ω @ 100 mA - optimized for turn-on speed |
| 7 GOFF | Sink output terminal | Drives gate low with 4 A peak; VGOFFL = 120 mV @ 100 mA - minimizes Miller-induced false turn-on |
| 8 GNDISO | Isolated gate return | Reference for VH, GON, GOFF; must be routed separately from logic ground to preserve isolation integrity |
Key Features
| Feature | Design Value |
|---|---|
| Separated GON/GOFF outputs | Enables independent gate resistor tuning for optimized turn-on/turn-off timing and EMI reduction |
| Hardware interlock via dual inputs | Prevents simultaneous high-side/low-side conduction in half-bridge without external logic |
| Integrated UVLO with hysteresis | Ensures clean power-up/power-down sequencing and eliminates oscillation near threshold |
| Thermal shutdown + safe state | Forces GOFF active and GON high-Z upon overtemperature - prevents shoot-through during fault |
| Low-power standby mode | Reduces system idle consumption while retaining fast wake-up (<200 µs) and deterministic re-enable |
Applications
| Industrial Motor Inverters | Uninterruptible Power Supplies (UPS) |
|---|---|
|
Use Scenario: Driving 1200 V IGBT half-bridges in variable-frequency drives for HVAC compressors and conveyor systems. IC Role / Device Role / Timing Role: Isolated gate driver providing independent turn-on/turn-off control with <75 ns propagation matching for precise PWM dead-time management. Use Value: Enables >10 kHz switching with robust CMTI immunity and thermal protection, reducing need for external desaturation detection circuitry. |
Use Scenario: Controlling high-efficiency SiC MOSFETs in online double-conversion UPS output stages. IC Role / Device Role / Timing Role: Galvanically isolated driver delivering 4 A peak current to manage fast dV/dt transitions while maintaining tight timing alignment across phases. Use Value: Eliminates optocoupler latency and aging drift, improving system reliability and reducing BOM count versus discrete isolation solutions. |
| Power Factor Correction (PFC) | Induction Heating Systems |
|
Use Scenario: Gate driving boost switch in continuous conduction mode (CCM) PFC front-ends for server PSUs and telecom rectifiers. IC Role / Device Role / Timing Role: High-CMTI isolated driver ensuring stable operation under high common-mode noise from line-frequency harmonics and switching ripple. Use Value: Maintains consistent gate voltage swing (up to 26 V) across wide input voltage range (90–265 VAC), supporting universal input designs. |
Use Scenario: Driving resonant half-bridge IGBTs in 20–100 kHz induction cooktops and industrial heating coils. IC Role / Device Role / Timing Role: Fast-propagation isolated driver enabling precise zero-voltage switching (ZVS) timing with minimal jitter-induced losses. Use Value: Reduces gate drive losses by 30% vs. non-rail-to-rail drivers due to full 0–26 V swing, improving thermal margin at high duty cycles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8233AD-D-IS | 3.3/5 V input compatible, 4 A output, but only 35 kV/µs CMTI (35 V/ns) and no integrated UVLO on VH rail | Lacks VH UVLO and thermal shutdown - requires external monitoring circuitry for safety-critical motor drives | Preferred where lower isolation rating suffices and external protection is already implemented |
| UCC5390SCD | 4 A sink/source, 150 V/ns CMTI, but uses single-output architecture with integrated Miller clamp - no separated GON/GOFF option | Optimized for half-bridge with Miller clamp; unsuitable for applications requiring independent turn-on/turn-off tuning | Select when Miller clamping is mandatory and layout constraints favor single-output routing |
Compared with Si8233AD-D-IS and UCC5390SCD, STGAP2SMTR uniquely combines separated outputs, VH UVLO, thermal shutdown, and 100 V/ns CMTI in a single SO-8 package - making it optimal for industrial inverters requiring both functional safety and layout flexibility.
Availability
STGAP2SMTR is available at Aetrix Electronics and suitable for industrial motor drives, uninterruptible power supplies, and power factor correction circuits requiring stable component supply, long-term lifecycle support, and UL-recognized isolation certification.
Supply support for STGAP2SMTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, analog, microcontrollers, and automotive-grade ICs.
The STGAP2S family is designed for high-reliability isolated gate driving in industrial power conversion - emphasizing robustness, integration of protection features, and compliance with international safety standards (UL 1577, IEC 60747-17).
FAQ
What is the maximum recommended switching frequency for STGAP2SMTR?
The datasheet specifies a maximum switching frequency of 1 MHz under recommended operating conditions. However, actual usable frequency depends on external gate resistor selection, load capacitance, and thermal management - typical designs operate between 20 kHz and 150 kHz for IGBT-based motor drives and up to 500 kHz for SiC MOSFET PFC stages with adequate heatsinking.
Does STGAP2SMTR support negative gate driving?
Yes - the device supports negative gate driving via external circuitry: connect VL (negative rail) to GNDISO and use a split supply (e.g., +15 V / –5 V) referenced to GNDISO. The GON/GOFF outputs remain rail-to-rail relative to GNDISO, enabling active pull-down below 0 V to suppress Miller-induced turn-on in high-dV/dt applications.
How does the standby mode affect output behavior?
In standby mode, STGAP2SMTR forces GOFF into active-low state and places GON in high-impedance - ensuring the driven power device remains safely off. Both VDD and VH quiescent currents drop significantly (to ≤65 µA and ≤550 µA), and wake-up occurs within 200 µs after valid input transition, preserving system responsiveness during low-power states.
Can STGAP2SMTR drive both IGBTs and SiC MOSFETs?
Yes - its 4 A sink/source capability, 26 V max gate drive, and 100 V/ns CMTI make it suitable for both 600–1700 V IGBTs and 650–1200 V SiC MOSFETs. For SiC devices, use lower gate resistors (e.g., 2.2–4.7 Ω) to exploit the fast 30 ns rise/fall times and avoid excessive dv/dt stress on the gate oxide.
STGAP2SMTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Magnetic Coupling
- Number of Channels:
- 1
- Voltage - Isolation:
- 1700VDC
- Common Mode Transient Immunity (Min):
- 100V/ns
- Propagation Delay tpLH / tpHL (Max):
- 100ns, 100ns
- Pulse Width Distortion (Max):
- 20ns
- Rise / Fall Time (Typ):
- 30ns, 30ns
- Current - Output High, Low:
- 4A, 4A
- Current - Peak Output:
- -
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- 9.6V ~ 26V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SO
- Approval Agency:
- -
STGAP2SMTR FAQ
1.How can I place an order for STGAP2SMTR through Aetrix?
Please submit a Request for Quotation (RFQ) for STGAP2SMTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STGAP2SMTR reliable?
The price and inventory of STGAP2SMTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STGAP2SMTR is usually 5 days.
3.What payment methods are accepted for STGAP2SMTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STGAP2SMTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STGAP2SMTR?
STGAP2SMTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STGAP2SMTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STGAP2SMTR?
For technical support, including STGAP2SMTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STGAP2SMTR requirements.
6.How does Aetrix verify that STGAP2SMTR is sourced from the original manufacturer or authorized distributors?
All STGAP2SMTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STGAP2SMTR meets industry standards.
7.What is the process for return or replacement of STGAP2SMTR?
All STGAP2SMTR units undergo pre-shipment inspection (PSI). If there is an issue with STGAP2SMTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STGAP2SMTR part is unused and in its original packaging.
Return procedure for STGAP2SMTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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