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Home > Products > Integrated Circuits (ICs) > Linear > Video Processing

STMicroelectronics STHDLS101AQTR

Name: STHDLS101AQTR
Brand: STMicroelectronics
SKU: STHDLS101AQTR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: STHDLS101AQTR

Manufacturer:: STMicroelectronics

Category:: Video Processing

Package:: 48-QFN

Datasheet:: STHDLS101AQTR.pdf

Description:: IC VIDEO LEVEL SHIFTER 48QFN

Quantity:: RFQ Add To RFQ list

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Product details

Overview

STHDLS101AQTR from STMicroelectronics is an HDMI 1.3-compliant AC-coupled level shifter that converts low-swing (0.2–1.2 V_PP) differential TMDS inputs from GMCH PCIe outputs into 3.3 V DC-coupled HDMI-compliant outputs, supporting up to 2.7 Gbps per lane, with integrated 50 Ω input termination, slew-rate-controlled outputs, and configurable HPD/DCD level shifting - deployed in notebook GPU interfaces and PC motherboard HDMI routing.

For engineers reviewing the STHDLS101AQTR datasheet, STHDLS101AQTR pinout, STHDLS101AQTR application, or STHDLS101AQTR equivalent, key selection criteria include inter-pair skew (<250 ps), intra-pair skew (<10 ps), ±6 kV HBM ESD rating, 3.3 V single-supply operation, and integrated DDC/HPD bidirectional level shifting for HDMI/DVI sink compatibility.

Technical Context

The device implements passive AC-coupled input reception with on-die 50 Ω termination and active current-steering output drivers compliant with HDMI 1.3 open-drain current-mode signaling. It contains no clocking, retiming, or state machines - all signal paths are transparent analog level-shifting channels.

HPD and DDC paths use integrated NMOS pass-gates with voltage-limiting architecture: DDC supports 3.3 V source / 5 V sink translation via programmable bias control (DDC_EN), while HPD_SINK features a 160 kΩ internal pull-down and HPD_SOURCE offers dual-mode (open-drain or buffered) output configurable via FUNCTION3.

Key Specifications

Parameter	Value and Actual Design Meaning
Max Data Rate	2.7 Gbps per lane - supports HDMI 1.3 1080p60 with 12-bit color depth
Input Voltage Range	0.2–1.2 V_PP AC-coupled differential - matches low-swing PCIe TMDS outputs from GMCH
Output Compliance	HDMI 1.3 open-drain current-steering - enables direct connection to HDMI sink termination
Inter-pair Skew	<250 ps - preserves timing alignment across all four TMDS lanes for pixel integrity
Intra-pair Skew	<10 ps - maintains differential signal fidelity within each TMDS pair
ESD Rating	±6 kV HBM on all I/O pins - ensures robustness during board assembly and connector hot-plug events
Supply Voltage	3.3 V ±10% - single-rail operation eliminates need for auxiliary supplies or LDOs
HPD Pull-down	160 kΩ integrated resistor on HPD_SINK - guarantees reliable "unplugged" detection without external components

Pinout & Package

STHDLS101AQTR is housed in a 48-pin QFN package (7 × 7 × 1 mm), thermally enhanced with exposed thermal pad, compatible with standard reflow profiles and high-density PCB layouts.

Pin/Terminal	Circuit Role	Design Meaning
IN_D1+ / IN_D1− to IN_D4+ / IN_D4−	AC-coupled differential inputs	Accept low-swing TMDS from GMCH PCIe outputs; internally terminated to 50 Ω
OUT_D1+ / OUT_D1− to OUT_D4+ / OUT_D4−	HDMI-compliant TMDS outputs	Current-steering open-drain outputs with controlled slew rate to minimize EMI
HPD_SINK	Hot-plug detect input	0–5 V logic input with 160 kΩ internal pull-down; detects HDMI cable insertion/removal
HPD_SOURCE	Configurable HPD output	Functionally selectable (via FUNCTION3) as open-drain or buffered 0–3.3 V output
SCL_SOURCE / SDA_SOURCE	3.3 V DDC interface (source side)	Connect to GMCH DDC controller; pulled up externally to 3.3 V
SCL_SINK / SDA_SINK	5 V DDC interface (sink side)	Connect to HDMI connector; pulled up externally to 5 V via integrated NMOS pass-gate
OE_N	Output enable (active-low)	Disables TMDS path and input termination when high; internal pull-down enables default operation
VCC33 / GND	Power supply	Single 3.3 V rail powers all functions; 10× VCC/GND pins ensure low-impedance distribution

Key Features

Feature	Design Value
No re-timing or configuration required	Zero-latency, stateless signal translation - eliminates timing closure complexity and firmware dependencies
Integrated 50 Ω input termination	Removes need for 8 external 50 Ω resistors, reducing BOM count and PCB area by >20 mm²
Output slew rate control	Eliminates external RC networks or chokes - reduces EMI emissions while maintaining signal integrity at 2.7 Gbps
Fail-safe TMDS outputs	Prevents backdrive damage to source chipset during hot-plug or power sequencing mismatches
Configurable HPD output mode	FUNCTION3 pin selects between open-drain (for 1 V pull-up) or buffered (0–3.3 V) HPD signaling per system requirements
Integrated DDC level shifters	Pass-gate architecture allows 3.3 V GMCH DDC to drive 5 V HDMI connector with <8 ns propagation delay

Applications

GPU-to-HDMI Interface

Notebook Display Routing

Use Scenario: Routing TMDS signals from Intel GMCH PCIe outputs to HDMI connectors on thin-client notebooks.

IC Role / Device Role / Timing Role: AC-to-DC level shifter enabling 1080p60 video transport across incompatible voltage domains without retiming.

Use Value: Eliminates need for discrete termination resistors and external slew control components, reducing layout complexity and improving signal margin at 2.25 Gbps.

Use Scenario: Integrating HDMI output on compact PC motherboards where PCIe lanes are multiplexed for display data.

IC Role / Device Role / Timing Role: Transparent TMDS level translator preserving sub-10 ps intra-pair skew across all four lanes.

Use Value: Enables compliance with HDMI 1.3 eye diagram requirements using existing GMCH silicon, avoiding costly chipset redesign.

DP-to-HDMI Adapter

DVI/HDMI Hybrid Port

Use Scenario: Active DisplayPort-to-HDMI adapter requiring DDC and HPD translation alongside TMDS level shifting.

IC Role / Device Role / Timing Role: Unified level shifter for TMDS, DDC (3.3 V ↔ 5 V), and HPD (0–5 V ↔ 0–3.3 V) in single QFN48 package.

Use Value: Reduces adapter BOM to one IC plus passive terminations - cuts component count by >12 vs. discrete solution.

Use Scenario: Motherboard with shared DVI/HDMI connector supporting both standards via software-selectable output mode.

IC Role / Device Role / Timing Role: Bidirectional DDC level shifter and configurable HPD driver enabling seamless protocol switching.

Use Value: Allows single physical port to negotiate either DVI or HDMI EDID handshake without hardware modification.

Equivalent & Alternatives

The following parts are listed as comparable options for similar HDMI level shifting applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
TI TFP401APZPR	Retiming-capable receiver with integrated PLL; requires external clock; no integrated DDC/HPD level shifting	Used in systems needing jitter cleanup or long-cable equalization; not suitable for transparent PCIe-to-HDMI routing	Select only if jitter reduction or cable equalization is required - adds latency and design complexity
NXP PTN3362BS	Supports HDMI 2.0 (6 Gbps); includes spread-spectrum clocking; higher power consumption (140 mA vs. 120 mA)	Targeted at 4K-capable designs; lacks integrated HPD pull-down resistor - requires external 160 kΩ	Choose for future-proof 4K support; accept added cost and layout overhead for external HPD resistor

Compared with TFP401APZPR and PTN3362BS, STHDLS101AQTR delivers zero-latency, no-clock-required level shifting with full DDC/HPD integration in a lower-power, cost-optimized footprint - ideal for legacy HDMI 1.3 implementations where simplicity and BOM reduction are prioritized.

Availability

STHDLS101AQTR is available at Aetrix Electronics and suitable for notebook GPU interfaces, PC motherboard HDMI routing, DP-to-HDMI adapters, and DVI/HDMI hybrid ports requiring stable component supply and long-term industrial availability.

Supply support for STHDLS101AQTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in automotive, industrial, and consumer ICs with strong analog/mixed-signal design heritage.

STHDLS101AQTR belongs to ST's HDMI interface product line, engineered specifically for AC-coupled TMDS signal translation in space-constrained PC and notebook platforms where minimal latency, low EMI, and integrated DDC/HPD functionality are critical.

FAQ

Does STHDLS101AQTR require an external clock or configuration interface?

No. The device operates as a fully transparent analog level shifter with no internal clock, PLL, or digital configuration registers. All signal paths - TMDS, DDC, and HPD - function immediately upon power-up with no initialization sequence or firmware involvement. OE_N is the only control signal, and its internal pull-down enables default operation when left unconnected.

What is the purpose of the REXT pin (Pin 6)?

REXT connects to an external resistor that sets internal bias currents for optimal high-frequency equalization. Per ST's datasheet, the recommended value is 10 kΩ to GND for nominal performance; deviation beyond ±20% may reduce eye opening at 2.7 Gbps. Direct connection to VCC33 or GND is not allowed - a 0 Ω resistor must be used for layout compatibility if unused.

How does HPD_SOURCE behave when FUNCTION3 is low versus high?

When FUNCTION3 = low, HPD_SOURCE operates as an open-drain output (VOH ≈ 0.2 V, VOL undefined), requiring external pull-up to desired voltage (e.g., 1 V). When FUNCTION3 = high, HPD_SOURCE becomes a buffered CMOS output (VOH ≈ 3.3 V, VOL ≈ 0.2 V), capable of driving 3.3 V logic directly without external components. Propagation delay remains ≤200 ns in both modes.

Can STHDLS101AQTR support HDMI 2.0 or higher data rates?

No. The device is specified and characterized only up to 2.7 Gbps per lane (HDMI 1.3), with maximum intra-pair skew of 10 ps and inter-pair skew of 250 ps - insufficient for HDMI 2.0's 6 Gbps minimum requirement. Its input sensitivity (0.2–1.2 V_PP) and output swing (400–600 mV) are optimized for HDMI 1.3 compliance and do not meet HDMI 2.0 electrical specifications.

STHDLS101AQTR Specifications

Product attributes: Attribute value

Manufacturer:: STMicroelectronics

Series:: -

Package/Case:: 48-QFN

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Function:: Level Shifter

Applications:: Consumer Video

Standards:: HDMI 1.3

Control Interface:: Serial

Voltage - Supply:: 3.3V

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 48-QFN (7x7)

STHDLS101AQTR FAQ

1.How can I place an order for STHDLS101AQTR through Aetrix?

Please submit a Request for Quotation (RFQ) for STHDLS101AQTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for STHDLS101AQTR reliable?

The price and inventory of STHDLS101AQTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STHDLS101AQTR is usually 5 days.

3.What payment methods are accepted for STHDLS101AQTR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STHDLS101AQTR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for STHDLS101AQTR?

STHDLS101AQTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your STHDLS101AQTR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for STHDLS101AQTR?

For technical support, including STHDLS101AQTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STHDLS101AQTR requirements.

6.How does Aetrix verify that STHDLS101AQTR is sourced from the original manufacturer or authorized distributors?

All STHDLS101AQTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STHDLS101AQTR meets industry standards.

7.What is the process for return or replacement of STHDLS101AQTR?

All STHDLS101AQTR units undergo pre-shipment inspection (PSI). If there is an issue with STHDLS101AQTR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The STHDLS101AQTR part is unused and in its original packaging.

Return procedure for STHDLS101AQTR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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