STMicroelectronics STLQ020PU19R

Overview

STLQ020PU19R from STMicroelectronics is a 200 mA ultra-low-quiescent-current low-dropout (LDO) voltage regulator in DFN6-2x2 package, delivering 1.9 V fixed output with ±2% accuracy at 25 °C and ±3% over –40 °C to +125 °C. It operates from 2 V to 5.5 V input, achieves 160 mV dropout at 200 mA, and draws only 300 nA quiescent current at no load-enabling multi-year battery life in always-on sensor and wearable systems.

For engineers reviewing the STLQ020PU19R datasheet, STLQ020PU19R pinout, STLQ020PU19R application, or STLQ020PU19R equivalent, key selection criteria include its sub-1 µA shutdown current (5 nA typ.), adaptive biasing for fast transient response, logic-controlled EN pin, output discharge capability (on selected versions), and thermal/overcurrent protection-critical for space-constrained, battery-powered edge nodes.

Technical Context

The STLQ020PU19R employs a CMOS-based pass transistor with adaptive biasing to maintain ultra-low I_q across load (0–200 mA) and input voltage (2–5.5 V) while delivering stable regulation and <135 µV_RMS output noise (10 Hz–100 kHz). Its internal bandgap reference and error amplifier enable tight line regulation (0.005 %/V typ.) and load regulation (0.0015 %/mA typ.) at room temperature.

Thermal shutdown activates at 160 °C (20 °C hysteresis), and short-circuit current is internally limited to 380 mA. The EN pin is CMOS-compatible, active-high, with no internal pull-up-requiring explicit tie-high or driver control to avoid floating states that could cause erratic enable behavior.

Key Specifications

Pinout & Package

STLQ020PU19R is housed in a thermally enhanced DFN6-2x2 (2.0 mm × 2.0 mm, 0.75–0.95 mm height) package with exposed pad for improved heat dissipation (R_thJA = 65 °C/W). Pin 1 (VIN) and Pin 2 (NC/ADJ) are on opposite corners; Pin 6 (VIN) and Pin 5 (VOUT) share diagonal symmetry-layout must respect DFN6 mechanical drawing DM00205706 and recommended footprint per DS12072 page 24.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with XC6210B192MR-G and ADP160ACBZ-1.9-R7, STLQ020PU19R uniquely combines 200 mA drive, 300 nA I_q, integrated EN, and DFN6-2x2 thermal performance-making it optimal for high-reliability, battery-constrained systems needing both headroom and longevity.

Availability

STLQ020PU19R is available at Aetrix Electronics and suitable for smartphone image sensor power, wearable PPG monitoring, portable medical diagnostics, and smart meter optical interfaces requiring stable component supply, long-lifecycle support, and guaranteed traceable sourcing.

Supply support for STLQ020PU19R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog components for industrial, automotive, and consumer markets.

The STLQ020 series belongs to ST's ultra-low-I_q LDO portfolio, engineered specifically for energy-harvesting and battery-operated edge devices demanding nanowatt standby, fast transient response, and robust protection in miniature packages.

FAQ

What is the minimum input voltage required for STLQ020PU19R to regulate 1.9 V output at full 200 mA load?

The minimum input voltage is 2.06 V, calculated as V_OUT + V_DROP = 1.9 V + 160 mV. Below this, the device enters dropout mode and output voltage declines linearly with input. The absolute minimum VIN rating is 2 V, but regulation is only guaranteed above 2.06 V under full load.

Does STLQ020PU19R require an external resistor divider for output voltage setting?

No. STLQ020PU19R is the fixed 1.9 V version; Pin 2 (NC/ADJ) is not connected internally and must remain unconnected. Resistor dividers are only required for adjustable versions (e.g., STLQ020PUR), where Pin 2 serves as the ADJ terminal referencing 0.8 V.

Can the exposed thermal pad on the DFN6-2x2 package be left unconnected?

No. The exposed pad must be soldered to a GND-connected copper pour using ≥4 thermal vias. Leaving it unconnected degrades thermal resistance (R_thJA increases from 65 °C/W to >100 °C/W), risks junction overheating above 125 °C, and may compromise long-term reliability under sustained 200 mA load.

Is output capacitor ESR critical for STLQ020PU19R stability, and what is the acceptable range?

Yes. The output capacitor must have ESR between 3 mΩ and 500 mΩ to ensure phase margin and prevent oscillation. X5R/X7R ceramic capacitors ≥1 µF meet this requirement across –40 °C to +125 °C, but NP0/C0G types should be avoided due to excessively low ESR (<1 mΩ), which can destabilize the control loop.