STMicroelectronics STM1404CTNJQ6F

Overview

STM1404CTNJQ6F from STMicroelectronics is a FIPS-140 Level 4 security supervisor IC designed for cryptographic module protection in POS terminals and secure embedded systems. It provides four high-impedance physical tamper inputs (TP1–TP4), over/under voltage detection (2.0 V / 4.2 V thresholds), customer-programmable over/under temperature monitoring (–35°C to +95°C), automatic battery switchover, and open-drain SAL/RST/PFO/BLD outputs. Its primary role is real-time intrusion detection and supply integrity enforcement during power transitions.

For engineers reviewing the STM1404CTNJQ6F datasheet, STM1404CTNJQ6F pinout, STM1404CTNJQ6F application, or STM1404CTNJQ6F equivalent, key selection criteria include tamper input configuration (NH/NL), VOUT behavior under alarm (ON/High-Z/Ground), VREF availability, battery switchover threshold (~2.4 V), and QFN16 3×3 mm package compatibility with secure PCB layout requirements.

Technical Context

The STM1404CTNJQ6F implements a multi-layered security monitoring architecture: four independent physical tamper pins (TP1–TP4) with configurable NH/NL biasing, dual-voltage comparators for VCC/VBAT monitoring (2.0 V undervoltage, 4.2 V overvoltage), and factory-programmable thermal thresholds (e.g., –25°C/–35°C low, +80°C/+85°C/+95°C high). All alarms trigger an active-low open-drain Security Alarm (SAL) output.

Its power management core integrates automatic VCC-to-VBAT switchover at ~2.4 V, a dedicated Vccsw indicator (low = VCC active, high = VBAT active), and battery low detection (BLD) with three selectable VDET thresholds (2.3 V / 2.5 V / 3.2 V). The RST output asserts on VCC drop below VRST or MR activation, with 200 ms typical reset timeout after recovery.

Key Specifications

Pinout & Package

STM1404CTNJQ6F uses a RoHS-compliant, lead-free QFN16 (3 mm × 3 mm) package with exposed thermal pad. Pin numbering follows standard QFN convention (pin 1 marked by dot, counterclockwise).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar security supervisor applications.

Compared with MAX1363EUB+T and DS1233M-5+, STM1404CTNJQ6F delivers certified FIPS-140 Level 4 functionality - including four physical tamper channels, programmable thermal limits, and alarm-driven VOUT disable - making it uniquely qualified for EMVCo, ZKA, and government-grade cryptographic modules where basic reset supervisors fail compliance.

Availability

STM1404CTNJQ6F is available at Aetrix Electronics and suitable for POS terminal manufacturing, EMVCo-certified payment device development, and ZKA-compliant banking hardware requiring stable component supply and long-term lifecycle assurance.

Supply support for STM1404CTNJQ6F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, and security solutions for industrial, automotive, and embedded markets.

The STM1404 family belongs to ST's security supervisor product line, engineered specifically to meet FIPS-140-2 Level 4 and EMVCo physical intrusion monitoring requirements in cryptographic modules used in financial and government applications.

FAQ

What is the function of the Vccsw pin on STM1404CTNJQ6F?

The Vccsw pin indicates the active supply source: it is low when VOUT is sourced from VCC and high when VOUT is sourced from VBAT. In STM1404C (the variant denoted by 'C' in CTNJQ6F), Vccsw goes high during SAL assertion, providing a reliable "battery active" signal for external circuitry such as p-channel MOSFET gate control or status LED indication.

How does the STM1404CTNJQ6F differ from STM1404A and STM1404B variants?

STM1404CTNJQ6F is the STM1404C variant, meaning its VOUT pin is driven to ground during SAL assertion - a critical feature for forcing immediate zeroization of external SRAM holding cryptographic keys. Unlike STM1404A (VOUT remains ON) or STM1404B (VOUT goes High-Z), STM1404C's grounded VOUT ensures deterministic power removal from sensitive memory, satisfying ZKA and FIPS-140-2 zeroization mandates.

Can the temperature trip points be reprogrammed in the field?

No. The over/under temperature thresholds (e.g., –35°C low, +85°C high) are factory-programmed during wafer test and permanently stored in one-time-programmable (OTP) memory. They cannot be modified post-manufacture. Selection of trip points must be specified at order time using ST's part-numbering scheme (e.g., CTNJQ6F denotes specific factory-configured thresholds).

What is the purpose of the VTPU pin (Pin 6) on STM1404CTNJQ6F?

On STM1404C (CTNJQ6F), Pin 6 is VTPU (Tamper Pull-Up), not VREF. It is internally switched between VCC and VBAT and serves as the bias source for TP1/TP3 tamper inputs. This eliminates the need for external pull-up resistors and ensures tamper detection remains functional even during VCC-to-VBAT switchover, maintaining continuous physical security monitoring.