STMicroelectronics STM32F091CBT7
- Part No.:
- STM32F091CBT7
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
STM32F091CBT7.pdf
- Description:
- IC MCU 32BIT 128KB FLASH 48LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,805
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Product details
Overview
STM32F091CBT7 from STMicroelectronics is an ARM® Cortex®-M0 32-bit microcontroller with 128 KB Flash, 32 KB SRAM (with hardware parity), and integrated CAN 2.0B interface - designed for industrial control nodes, smart sensors, and embedded gateway edge devices operating at 2.0–3.6 V supply. It delivers 48 MHz CPU performance, includes dual 12-bit DAC channels, a 12-bit 1.0 µs ADC (16-channel), and supports capacitive touch sensing up to 24 channels.
For engineers reviewing the STM32F091CBT7 datasheet, STM32F091CBT7 pinout, STM32F091CBT7 application, or STM32F091CBT7 equivalent, key selection criteria include CAN-enabled real-time control, low-power Stop/Standby modes with RTC wakeup, 5V-tolerant I/Os (69 pins), HDMI CEC support, and SWD debug compatibility - all in a compact LQFP48 package.
Technical Context
The STM32F091CBT7 implements a single-cycle ARM Cortex-M0 core with nested vectored interrupt controller (NVIC) and SysTick timer, supporting deterministic real-time execution. Its clock system integrates multiple oscillators: 4–32 MHz HSE, 32 kHz LSE for RTC calibration, 8 MHz HSI with x6 PLL, and a factory-trimmed 48 MHz HSI48 oscillator synchronized via external clock recovery (CRS).
Peripheral integration centers on mixed-signal control: one 12-bit ADC with VREFINT and temperature sensor, two 12-bit DACs with configurable output buffers, two programmable analog comparators, and a dedicated touch sensing controller (TSC) with spread-spectrum modulation for noise immunity in noisy environments.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M0, 48 MHz max - enables deterministic real-time task scheduling with <100 ns interrupt latency. |
| Memory | 128 KB Flash + 32 KB SRAM with HW parity - supports secure firmware updates and ECC-protected data buffers. |
| Analog Peripherals | 1× 12-bit 1.0 µs ADC (16 ch), 2× 12-bit DAC, 2× analog comparators - enables closed-loop analog control without external signal chain components. |
| Communication | CAN 2.0B, 8× USART (3 with ISO7816/LIN/IrDA), 2× I²C (Fast Mode Plus), 2× SPI/I²S - suitable for multi-protocol industrial fieldbus edge nodes. |
| Power & Timing | 2.0–3.6 V operation, Sleep/Stop/Standby modes, RTC with alarm/wakeup, PVD - ensures robust operation across battery-backed and wide-input industrial supplies. |
| I/O Capability | Up to 39 GPIOs in LQFP48; 69 pins 5V-tolerant, 19 with independent VDDIO2 supply - simplifies level-shifting in mixed-voltage systems. |
| Package | LQFP48, 7 × 7 mm, 0.5 mm pitch - compatible with standard reflow processes and cost-effective PCB routing. |
Pinout & Package
LQFP48 package (7 × 7 mm, 0.5 mm pitch), RoHS-compliant and ECOPACK®2 certified, optimized for thermal dissipation and automated assembly in space-constrained industrial modules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VSS, VSSA | Power supply and ground rails | Separate analog/digital domains enable clean ADC/DAC operation; VDDA must be ≥2.4 V for full 12-bit accuracy. |
| PA0–PA15, PB0–PB15, PC13–PC15 | General-purpose I/Os | 39 total GPIOs; PA0–PA15 and PB0–PB15 support external interrupts and remappable alternate functions including CAN_RX/TX, USART, SPI. |
| PA11/PA12 | USB DM/DP (not applicable to STM32F091CBT7) | Not connected - this variant lacks USB PHY; pins are available as GPIO or alternate functions (e.g., TIM1_CH1/CH2). |
| PA13/PA14 | SWDIO/SWCLK | Dedicated Serial Wire Debug interface - enables non-intrusive debugging and flash programming with minimal pin overhead. |
| NRST | Active-low reset input | Accepts 1.65–5.5 V logic; internal pull-up; supports external reset supervisor or push-button debounced reset. |
| BOOT0 | Boot mode selection | High at power-up enters system memory bootloader; used for field firmware recovery without debugger. |
Key Features
| Feature | Design Value |
|---|---|
| CAN 2.0B interface | Integrated bus controller with TX/RX FIFOs and automatic retransmission - eliminates need for external CAN transceiver driver logic in basic node designs. |
| HDMI CEC wakeup | Dedicated CEC header detection circuit wakes MCU from Stop/Standby - enables ultra-low-power remote-control listening in consumer IoT gateways. |
| Capacitive Touch Sensing (TSC) | 24-channel spread-spectrum acquisition engine with built-in charge transfer and noise filtering - supports robust touchkey/slider/rotary implementations without external ICs. |
| 48 MHz HSI48 oscillator | Factory-trimmed internal RC source with CRS synchronization - provides USB-class timing accuracy without external crystal, reducing BOM count and board area. |
| Independent VDDIO2 supply | 19 GPIOs powered separately (1.65–3.6 V) - allows direct interfacing with 1.8 V or 2.5 V peripherals while main I/Os run at 3.3 V. |
Applications
| Industrial PLC I/O Module | Smart HVAC Sensor Node |
|---|---|
Use Scenario: Compact DIN-rail-mounted digital input/output expansion module communicating over CANopen. IC Role / Device Role / Timing Role: Primary controller managing 16-channel opto-isolated inputs, 8-channel relay drivers, and CAN message framing with deterministic 1 ms cycle time. Use Value: Integrated CAN peripheral and 5V-tolerant GPIOs eliminate level translators and external CAN controller, reducing component count by ≥4 and PCB area by 25%. | Use Scenario: Battery-powered wireless temperature/humidity/CO₂ sensor with local display and BLE gateway handoff. IC Role / Device Role / Timing Role: System-on-chip managing analog sensor conditioning (ADC + VREFINT), capacitive touch UI, RTC-based sampling schedule, and low-power UART-to-BLE bridge. Use Value: Standby current of 0.4 µA (with RTC active) extends 2× AA battery life to >5 years; TSC replaces mechanical buttons, improving IP65 enclosure integrity. |
| Automotive Body Control Unit (BCU) | Home Appliance Motor Controller |
Use Scenario: Door module controlling window lift, mirror adjustment, and interior lighting with LIN communication to central ECU. IC Role / Device Role / Timing Role: Real-time motor control hub using TIM1 advanced timer for 6-channel PWM, LIN physical layer via USART with auto-baud detection, and wake-on-LIN event. Use Value: Single-chip solution replaces discrete MCU + LIN transceiver + PWM generator; 48 MHz CPU handles simultaneous LIN protocol stack and motor commutation timing. | Use Scenario: Brushless DC (BLDC) motor drive in washing machine drum control with current sensing and thermal protection. IC Role / Device Role / Timing Role: Field-oriented control (FOC) executor using ADC for shunt current sampling, DAC for analog feedback reference, and TIM1 for precise 3-phase PWM generation with dead-time insertion. Use Value: On-chip 12-bit ADC (1.0 µs conversion) captures fast current transients; hardware parity SRAM prevents corruption of FOC lookup tables during EMI events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32F072CBT6 | Same LQFP48 package, 128 KB Flash, but no CAN interface and only 1 DAC channel; lower peripheral count (no TSC, fewer timers). | Suitable for USB-connected sensor hubs or simple motor drives where CAN is unnecessary. | Select when CAN and dual DAC are not required - reduces cost and simplifies layout, but sacrifices fieldbus interoperability. |
| STM32F303CBT6 | ARM Cortex-M4F core, 128 KB Flash, 32 KB SRAM, includes FPU and higher-resolution ADC (12-bit @ 5 MSPS), but no CAN 2.0B (only CAN FD via external transceiver). | Better suited for computationally intensive tasks like FFT-based vibration analysis or digital power factor correction. | Choose for floating-point math or high-speed analog acquisition; avoid if CAN 2.0B compliance and deterministic low-latency interrupt response are mandatory. |
Compared with STM32F072CBT6, the STM32F091CBT7 adds essential CAN 2.0B and dual DAC for industrial fieldbus nodes; versus STM32F303CBT6, it trades FPU capability for guaranteed CAN timing predictability and lower dynamic power - making it optimal for resource-constrained, protocol-critical edge controllers.
Availability
STM32F091CBT7 is available at Aetrix Electronics and suitable for industrial automation, smart building sensor networks, and automotive body electronics requiring stable component supply and long-term manufacturability.
Supply support for STM32F091CBT7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in microcontrollers, power management, MEMS, and automotive-grade ICs with vertical manufacturing and rigorous AEC-Q100 qualification.
The STM32F0 series targets cost-sensitive, low-power embedded applications demanding ARM Cortex-M0 efficiency, rich analog integration, and industrial-grade reliability - bridging the gap between 8-bit legacy platforms and high-end Cortex-M4 solutions.
FAQ
What is the maximum operating frequency and voltage range for the STM32F091CBT7?
The STM32F091CBT7 operates at up to 48 MHz CPU frequency with a supply voltage range of 2.0 V to 3.6 V for digital I/Os and 2.4 V to 3.6 V for the analog domain (VDDA). The 48 MHz clock is derived from the internal HSI48 oscillator, which is factory-trimmed and optionally synchronized via the Clock Recovery System (CRS) for improved stability.
Does the STM32F091CBT7 support USB device functionality?
No, the STM32F091CBT7 does not include a USB physical layer (PHY) or USB controller. While pins PA11 and PA12 are present in the LQFP48 package, they are not connected to a USB interface in this variant - they function as general-purpose I/Os or alternate functions such as TIM1_CH1/TIM1_CH2. USB capability requires the STM32F072 or STM32F042 series.
How many I/O pins are 5V-tolerant, and what is the significance of VDDIO2?
Of the 39 GPIOs in the LQFP48 package, 34 are 5V-tolerant (including all PA/PB/PC pins except PC13–PC15). Additionally, 19 pins (PA0–PA7, PB0–PB7, PC0–PC3) support independent VDDIO2 supply (1.65–3.6 V), enabling direct connection to 1.8 V or 2.5 V peripherals without level shifters - critical for mixed-voltage industrial interfaces.
What debug interface does the STM32F091CBT7 use, and are SWD pins shared with other functions?
The STM32F091CBT7 uses Serial Wire Debug (SWD) via dedicated pins PA13 (SWDIO) and PA14 (SWCLK). These pins are not multiplexed with other alternate functions - they serve exclusively for debug and programming. SWD requires only two signals (plus GND and VDD for target power), enabling compact JTAG/SWD debug connectors and reliable in-system programming even in dense layouts.
STM32F091CBT7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 48-LQFP
- Series:
- STM32F0
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0
- Core Size:
- 32-Bit Single-Core
- Speed:
- 48MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, SPI, UART/USART
- Peripherals:
- DMA, I2S, POR, PWM, WDT
- Number of I/O:
- 38
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 32K x 8
- Voltage - Supply (Vcc/Vdd):
- 2V ~ 3.6V
- Data Converters:
- A/D 13x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32F091CBT7 FAQ
1.How can I place an order for STM32F091CBT7 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32F091CBT7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32F091CBT7 reliable?
The price and inventory of STM32F091CBT7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32F091CBT7 is usually 5 days.
3.What payment methods are accepted for STM32F091CBT7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32F091CBT7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32F091CBT7?
STM32F091CBT7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32F091CBT7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32F091CBT7?
For technical support, including STM32F091CBT7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32F091CBT7 requirements.
6.How does Aetrix verify that STM32F091CBT7 is sourced from the original manufacturer or authorized distributors?
All STM32F091CBT7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32F091CBT7 meets industry standards.
7.What is the process for return or replacement of STM32F091CBT7?
All STM32F091CBT7 units undergo pre-shipment inspection (PSI). If there is an issue with STM32F091CBT7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32F091CBT7 part is unused and in its original packaging.
Return procedure for STM32F091CBT7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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