STMicroelectronics STM32F100CBT7BTR
- Part No.:
- STM32F100CBT7BTR
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
STM32F100CBT7BTR.pdf
- Description:
- IC MCU 32BIT 128KB FLASH 48LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
STM32F100CBT7BTR from STMicroelectronics is a low-density value-line ARM® Cortex®-M3 32-bit microcontroller with 128 KB Flash, 8 KB SRAM, 24 MHz max CPU frequency, 12-bit ADC (16-channel, 1.2 µs), and dual 12-bit DACs. It integrates up to 8 communication interfaces including 3 USARTs, 2 I²C, 2 SPI, and CEC, and targets cost-sensitive industrial control, sensor nodes, and smart peripherals requiring embedded real-time processing.
For engineers reviewing the STM32F100CBT7BTR datasheet, STM32F100CBT7BTR pinout, STM32F100CBT7BTR application, or STM32F100CBT7BTR equivalent, key selection criteria include Flash/SRAM size, 24 MHz Cortex-M3 performance, 5 V-tolerant I/O count (up to 51 pins), RTC with VBAT support, and integrated analog peripherals (ADC+DAC) in LQFP48 package.
Technical Context
The device implements an ARM Cortex-M3 core with single-cycle multiply and hardware divide, executing at up to 24 MHz (1.25 DMIPS/MHz). Its clock system includes factory-trimmed 8 MHz RC, 40 kHz RC, 4–24 MHz external crystal oscillator, PLL for CPU clock generation, and dedicated 32 kHz oscillator for RTC calibration.
Memory architecture features unified 128 KB Flash (512-byte pages, 10K erase cycles), 8 KB SRAM, and 96-bit unique ID. Peripherals are managed via NVIC with 68 interrupt vectors, 7-channel DMA supporting ADC, timers, USARTs, SPIs, I²Cs, and DACs, and EXTI supporting 16 external interrupt lines mapped across GPIO ports.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M3, 24 MHz max - enables deterministic real-time execution with 1.25 DMIPS/MHz efficiency for control loops and protocol stacks. |
| Flash Memory | 128 KB - sufficient for complex firmware with bootloader, USB/CAN stack, and application logic in single-chip deployment. |
| SRAM | 8 KB - supports moderate data buffering, RTOS task stacks, and sensor fusion algorithms without external RAM. |
| ADC | 1 × 12-bit, 1.2 µs conversion, 16 channels - enables simultaneous sampling of multiple analog sensors (e.g., temperature, voltage, current) at ≥833 kSPS aggregate rate. |
| DAC | 2 × 12-bit - provides precise analog output for motor control reference signals, audio waveform generation, or calibration voltage sources. |
| I/O Pins | 51 GPIO, 5 V-tolerant - simplifies interface to legacy 5 V logic, industrial sensors, and discrete actuators without level shifters. |
| Timers | 12 timers including advanced-control timer with dead-time generation - supports 3-phase motor control, digital power supply regulation, and PWM-driven lighting systems. |
| Communication | 3 USARTs (LIN/IrDA/ISO7816), 2 I²C, 2 SPI, CEC - enables multi-protocol connectivity for HMI, metering, and consumer electronics control applications. |
Pinout & Package
LQFP48 package (7 × 7 mm, 0.5 mm pitch), 48-pin quad flat lead frame with exposed thermal pad; RoHS-compliant, ECOPACK® certified.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Power supply and ground | Core and I/O domain supply (2.0–3.6 V); separate VDDA/VSSA required for analog accuracy. |
| PA0–PA15, PB0–PB15, PC13–PC15 | General-purpose I/O | 51 total GPIOs; all mappable to 16 EXTI lines; most 5 V-tolerant - enables flexible peripheral remapping and robust interfacing. |
| OSC_IN / OSC_OUT | External crystal oscillator input/output | Supports 4–24 MHz quartz crystal for precise clock source; internal trimming allows ±1% accuracy over temperature. |
| NRST | Active-low reset input | Asynchronous reset with Schmitt trigger; compatible with push-button, supervisor ICs, or microcontroller-initiated system recovery. |
| BOOT0 | Boot mode selection | High at power-up selects system memory boot (for ISP via USART); enables field firmware updates without debugger. |
| VREF+ | Analog reference voltage input | Optional external reference (up to 3.6 V) for ADC/DAC full-scale adjustment - improves measurement linearity vs. internal VREFINT. |
Key Features
| Feature | Design Value |
|---|---|
| Low-power operation | Sleep/Stop/Standby modes with VBAT-backed RTC and backup registers - enables battery-operated devices with <1 µA Standby current (typ). |
| Serial wire debug (SWD) | 2-pin debug interface replacing JTAG - reduces PCB footprint and routing complexity while retaining full flash programming and real-time trace capability. |
| CRC calculation unit | Hardware-accelerated CRC-32 generator - offloads checksum computation for firmware integrity checks, OTA update validation, and communication packet verification. |
| Temperature sensor | Integrated calibrated sensor (±1.5°C accuracy) connected to ADC channel 16 - enables on-chip thermal monitoring without external components. |
| CEC interface | HDMI Consumer Electronics Control compliant - allows MCU to act as CEC initiator or follower in AV equipment for remote control interoperability. |
| Programmable voltage detector (PVD) | Configurable threshold monitoring of VDD - triggers interrupt or reset on brown-out, enabling graceful shutdown or data preservation before power loss. |
Applications
| Industrial Sensor Node | Smart Lighting Controller |
|---|---|
Use Scenario: Compact environmental monitor measuring temperature, humidity, and ambient light in factory automation cabinets. IC Role / Device Role / Timing Role: Main controller executing sensor fusion, local decision logic, and UART-based Modbus RTU communication to PLC. Use Value: Integrated 12-bit ADC + temperature sensor eliminates external signal conditioning; 5 V-tolerant I/O interfaces directly to 24 V industrial sensors; low-power Stop mode extends battery life to >2 years. | Use Scenario: DALI-compatible LED driver managing color mixing, dimming profiles, and thermal derating in architectural lighting fixtures. IC Role / Device Role / Timing Role: DALI slave controller with dual 12-bit DACs generating PWM reference voltages and real-time thermal compensation using internal sensor. Use Value: Hardware dead-time generation in advanced timer ensures safe MOSFET switching; CEC interface enables HDMI-linked lighting sync; 128 KB Flash hosts DALI stack + lighting effects engine. |
| USB-C Power Delivery Monitor | Home Appliance UI Controller |
Use Scenario: Embedded monitor in USB-C wall charger verifying CC line voltage, VBUS status, and negotiating PD contracts via Type-C port. IC Role / Device Role / Timing Role: PD policy engine interfacing with USB-C transceiver via GPIO and UART; manages state machine and fault response within strict timing windows. Use Value: 24 MHz Cortex-M3 meets USB PD 3.0 timing requirements; 3 USARTs support dual UART (transceiver + host debug); 8 KB SRAM buffers PD message exchange and log history. | Use Scenario: Front-panel controller in washing machine handling button matrix, LED indicators, buzzer, and motor speed feedback via Hall sensor. IC Role / Device Role / Timing Role: Real-time UI processor running FreeRTOS, scanning inputs, driving outputs, and communicating with main MCU via I²C. Use Value: 51 GPIOs support 16-button matrix + 8 LEDs + buzzer + 3x Hall sensor inputs; integrated DAC drives analog meter display; RTC maintains wash cycle timing during power interruption. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32F070CBT6 | ARM Cortex-M0, 48 MHz, 128 KB Flash, no DAC, 12-bit ADC (10 ch) | Lacks dual DAC and CEC; lower interrupt latency but no hardware division or advanced timer dead-time generation | Select when cost sensitivity outweighs need for DAC/CEC and advanced motor control features. |
| STM32G031K8T6 | ARM Cortex-M0+, 64 MHz, 64 KB Flash, 12-bit ADC (19 ch), no DAC, 1x USART | Higher clock speed and better ADC channel count, but missing second USART, CEC, and DAC; different pinout and memory map | Prefer for new designs needing higher throughput and modern peripherals, accepting trade-off in analog output capability. |
Compared with STM32F100CBT7BTR, STM32F070CBT6 offers lower cost and simpler toolchain but sacrifices DAC-based analog control and CEC compliance; STM32G031K8T6 delivers higher performance and richer ADC resources yet requires redesign for missing DAC and dual-communication interface support.
Availability
STM32F100CBT7BTR is available at Aetrix Electronics and suitable for industrial sensor nodes, smart lighting controllers, USB-C power delivery monitors, and home appliance UI controllers requiring stable component supply and long-term manufacturing continuity.
Supply support for STM32F100CBT7BTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, MEMS, and automotive semiconductors since 1987.
This part belongs to the STM32F100 value-line series, engineered specifically for cost-optimized, low-power embedded applications where Flash density, analog integration, and industrial-grade I/O tolerance are prioritized over maximum performance or connectivity breadth.
FAQ
What is the maximum operating frequency and associated power consumption of STM32F100CBT7BTR?
Maximum CPU frequency is 24 MHz. At 24 MHz, 3.3 V, and full peripheral enablement, typical active current is 12.5 mA (Run mode, Flash execution). In Stop mode with regulator active, current drops to 3.5 µA (typ) at 25°C; Standby mode consumes 1.7 µA (typ) with RTC and backup registers active.
Does STM32F100CBT7BTR support in-application programming (IAP) and what boot options are available?
Yes, it supports IAP via system memory bootloader activated by BOOT0 = 1 at reset. Boot options include main Flash memory (default), system memory (for USART-based ISP), and embedded SRAM (for RAM-resident code execution). The option bytes allow permanent configuration of read protection and write protection per Flash sector.
How many analog-to-digital converter (ADC) channels are accessible and what is their effective resolution?
The device has one 12-bit ADC with up to 16 external input channels (plus internal temperature sensor and VREFINT). Effective resolution is 12 bits under standard conditions; integral nonlinearity is ±2 LSB (max), and conversion time is fixed at 1.2 µs per sample, enabling up to 833 kSPS aggregate throughput across multiplexed channels.
What debug interfaces does STM32F100CBT7BTR support and are they available in all package variants?
It supports Serial Wire Debug (SWD) and JTAG via dedicated SWDIO, SWCLK, and optional TMS/TCK/TDO/TDI pins. SWD is fully functional in LQFP48; all debug signals are routed to accessible pins (PA13, PA14, PA15, PB3, PB4) and require no external pull-ups for basic operation. No debug interface is disabled by package choice.
STM32F100CBT7BTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 48-LQFP
- Series:
- STM32F1
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M3
- Core Size:
- 32-Bit Single-Core
- Speed:
- 24MHz
- Connectivity:
- I2C, IrDA, LINbus, SPI, UART/USART
- Peripherals:
- DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
- Number of I/O:
- 37
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 8K x 8
- Voltage - Supply (Vcc/Vdd):
- 2V ~ 3.6V
- Data Converters:
- A/D 10x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32F100CBT7BTR FAQ
1.How can I place an order for STM32F100CBT7BTR through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32F100CBT7BTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32F100CBT7BTR reliable?
The price and inventory of STM32F100CBT7BTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32F100CBT7BTR is usually 5 days.
3.What payment methods are accepted for STM32F100CBT7BTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32F100CBT7BTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32F100CBT7BTR?
STM32F100CBT7BTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32F100CBT7BTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32F100CBT7BTR?
For technical support, including STM32F100CBT7BTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32F100CBT7BTR requirements.
6.How does Aetrix verify that STM32F100CBT7BTR is sourced from the original manufacturer or authorized distributors?
All STM32F100CBT7BTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32F100CBT7BTR meets industry standards.
7.What is the process for return or replacement of STM32F100CBT7BTR?
All STM32F100CBT7BTR units undergo pre-shipment inspection (PSI). If there is an issue with STM32F100CBT7BTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32F100CBT7BTR part is unused and in its original packaging.
Return procedure for STM32F100CBT7BTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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