STMicroelectronics STM32F302RET7TR
- Part No.:
- STM32F302RET7TR
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
STM32F302RET7TR.pdf
- Description:
- IC MCU 32BIT 512KB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:4,912
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32F302RET7TR from STMicroelectronics is an ARM® Cortex®-M4 32-bit microcontroller with FPU, 72 MHz max CPU frequency, 512 KB Flash, 64 KB SRAM (with HW parity on first 32 KB), and integrated analog peripherals including two 12-bit ADCs (18-channel, 0.20 µs conversion), one 12-bit DAC, four rail-to-rail comparators, and two operational amplifiers usable in PGA mode - deployed in industrial motor control, digital power supplies, and sensor fusion systems.
For engineers reviewing the STM32F302RET7TR datasheet, STM32F302RET7TR pinout, STM32F302RET7TR application, or STM32F302RET7TR equivalent, key selection considerations include its dual ADC architecture with independent analog supplies (2.0–3.6 V), flexible FSMC interface for external memory expansion, CAN 2.0B support, and capacitive touch sensing capability across up to 24 channels.
Technical Context
The device implements a tightly coupled ARM Cortex-M4 core with hardware FPU, single-cycle MAC, and DSP instruction set, paired with a memory protection unit (MPU) for secure task isolation. Its analog subsystem integrates two independent 12-bit ADCs with selectable resolution (6/8/10/12 bits), separate VDDA supply domain, and hardware oversampling - enabling simultaneous high-speed current/voltage sampling in motor control loops.
Clock management includes dual oscillators (4–32 MHz HSE + 32 kHz LSE), internal 8 MHz RC with x16 PLL, and 40 kHz LSI; peripheral interconnect uses a multi-layer AHB/APB matrix supporting concurrent DMA transfers across ADC, DAC, timers, and communication interfaces - critical for deterministic real-time response in closed-loop systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M4 with FPU, 72 MHz max, supports DSP instructions and MPU for RTOS-safe partitioning |
| Memory | 512 KB Flash (128-bit wide, 0-wait-state up to 72 MHz), 64 KB SRAM (HW parity on first 32 KB) |
| ADC | Two 12-bit ADCs, 18 channels total, 0.20 µs conversion time, 12/10/8/6-bit resolution selectable per group |
| DAC | One 12-bit DAC channel, monotonic, 1 µs settling time, analog supply range 2.4–3.6 V |
| Op-Amp | Two rail-to-rail op-amps, fully accessible pins, configurable as PGA (gain 1–16), 2.4–3.6 V analog supply |
| Comparator | Four ultra-fast rail-to-rail comparators, propagation delay < 50 ns, 2.0–3.6 V analog supply |
| Timers | 11 timers: one 32-bit, six 16-bit general-purpose, one advanced-control (6-PWM + deadtime), two watchdogs |
| Communication | CAN 2.0B, three I²C (Fast Mode Plus, 1 Mbit/s), five USART/UART, four SPI/I²S, USB 2.0 FS with LPM |
Pinout & Package
LQFP64 package (10 × 10 mm, 0.5 mm pitch), thermally enhanced with exposed thermal pad; 64-pin square-outline quad flat pack suitable for automated optical inspection and reflow-compatible PCB assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA | Core & analog power supply | Separate 2.0–3.6 V domains enable noise-isolated analog signal chain; VDDA must be ≥ VDD for ADC/DAC stability |
| VSS, VSSA | Ground reference | Dedicated analog ground (VSSA) required for sub-LSB ADC linearity; star grounding recommended |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/O | Up to 115 fast I/Os; most 5 V-tolerant, all mappable to external interrupt vectors for edge-triggered wake-up |
| PA1, PA2, PA3, PA4, PA5, PA6, PA7 | ADC1/ADC2 input channels | Support simultaneous sampling across both ADCs; dedicated VREF+ and VREF– pins available for precision referencing |
| PA4, PA5 | DAC output & trigger | PA4 = DAC_OUT1; PA5 = optional DAC trigger input - enables synchronized waveform generation with timer events |
| PA11, PA12 | USB D+/D− | Full-speed USB 2.0 physical layer; internal transceivers eliminate need for external PHY; requires 1.5 kΩ pull-up on D+ |
| PD0, PD1 | CAN RX/TX | Dedicated CAN2.0B interface; supports bit rates up to 1 Mbit/s; internal loopback mode for self-test |
| PC13–PC15 | RTC oscillator inputs | Connect 32.768 kHz crystal; PC14/PC15 support calibration trim via RCC_BDCR register for ±10 ppm accuracy |
Key Features
| Feature | Design Value |
|---|---|
| Flexible Static Memory Controller (FSMC) | Supports NOR/PSRAM/NAND/CF cards with programmable timing; enables direct interface to external displays, FPGA co-processors, or legacy memory modules |
| Capacitive Sensing (TSC) | 24-channel touch-sensing controller with built-in charge transfer, supporting touchkey, linear slider, and rotary wheel without external components |
| Advanced Timer (TIM1) | 6-channel complementary PWM with programmable deadtime (1–1023 ns), emergency stop via BKIN pin - essential for 3-phase inverter gate driving |
| Independent Analog Domains | Dual VDDA supplies (ADC/DAC/COMP/OPAMP) allow independent filtering and regulation - reduces crosstalk in mixed-signal applications |
| Low-power Modes | Sleep (CPU off, peripherals active), Stop (1.7 µA typical), Standby (1.3 µA) with RTC/VBAT backup retention - extends battery life in portable instrumentation |
| 96-bit Unique ID | Factory-programmed serial number accessible via system memory; used for secure firmware binding, license enforcement, or device authentication |
Applications
| Industrial Motor Control | Digital Power Supply |
|---|---|
Use Scenario: Field-oriented control (FOC) of 3-phase BLDC/PMSM motors using shunt-based current sensing. IC Role / Device Role / Timing Role: MCU executes FOC algorithm, synchronizes dual ADC sampling of phase currents, generates 6-PWM with deadtime via TIM1, and monitors DC-link voltage via DAC-reflected feedback. Use Value: Simultaneous 0.20 µs ADC conversions on two independent channels enable precise current reconstruction at 20 kHz PWM switching frequency. | Use Scenario: Isolated AC/DC or DC/DC converter with adaptive voltage regulation and fault logging. IC Role / Device Role / Timing Role: Measures primary-side current/voltage, regulates output via PID loop, drives synchronous rectifiers via advanced timers, and logs overvoltage/overcurrent events to Flash. Use Value: Integrated op-amps configured as PGAs condition small-signal current sense outputs before ADC digitization - eliminating external signal conditioning ICs. |
| Capacitive Touch Interface | Multi-Channel Data Acquisition |
Use Scenario: Human-machine interface for medical devices requiring glove-compatible, water-resistant touch controls. IC Role / Device Role / Timing Role: TSC peripheral scans 12-key matrix and 2 rotary encoders; firmware applies noise rejection algorithms and reports gestures via UART to host processor. Use Value: Hardware-accelerated charge-transfer sensing achieves >60 dB SNR in noisy EMI environments - no external RC networks or shielded traces needed. | Use Scenario: Portable environmental monitor measuring temperature, humidity, gas concentration, and ambient light. IC Role / Device Role / Timing Role: Coordinates sequential sampling across multiple sensors using timer-triggered ADC sequences, stores calibrated data in SRAM, and transmits via USB or BLE bridge. Use Value: Dual ADCs operate in interleaved mode to achieve effective 14-bit resolution at 1 MSPS - sufficient for high-fidelity sensor fusion without external oversampling ASICs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32F303RET7 | Same package and pinout; adds 16 KB CCM RAM, enhanced ADC (2.4 MSPS), and additional comparator | Better suited for high-throughput sensor fusion where CCM RAM accelerates FFT processing | Select when needing higher ADC throughput or extra tightly coupled RAM for real-time math kernels |
| STM32G431KBT6 | ARM Cortex-M4 @ 170 MHz, 128 KB Flash, 32 KB SRAM, same analog IP but improved op-amp GBW (10 MHz vs 2.4 MHz) | Superior dynamic performance for active filter design and faster closed-loop bandwidth | Prefer for new designs targeting >100 kHz control loops or higher analog signal bandwidth |
Compared with STM32F302RET7TR, the STM32F303RET7 offers higher ADC speed and CCM RAM for compute-intensive tasks, while the STM32G431KBT6 delivers significantly higher CPU clock and op-amp bandwidth - making it more suitable for demanding real-time control where latency and analog fidelity are critical.
Availability
STM32F302RET7TR is available at Aetrix Electronics and suitable for industrial motor control, digital power supplies, capacitive touch interfaces, and multi-channel data acquisition systems requiring stable component supply across extended product lifecycles.
Supply support for STM32F302RET7TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and automotive-grade components since 1987.
The STM32F3 series targets cost-sensitive, analog-intensive embedded applications - combining high-precision mixed-signal peripherals with Cortex-M4 performance to simplify system architecture in motor control, digital power, and human interface designs.
FAQ
What is the maximum operating frequency and supported voltage range for STM32F302RET7TR?
The STM32F302RET7TR operates at up to 72 MHz CPU frequency with a VDD supply range of 2.0 V to 3.6 V. Its analog peripherals require separate VDDA supply within 2.0–3.6 V (ADC/COMP) or 2.4–3.6 V (DAC/OPAMP), and VDDA must not fall below VDD during operation to maintain specification compliance.
Does STM32F302RET7TR support hardware CRC calculation and memory protection?
Yes, it includes a dedicated CRC calculation unit compliant with IEEE-802.3 and a full-featured memory protection unit (MPU) supporting eight regions with configurable size, access permissions, and subregion disable - enabling secure RTOS partitioning and firmware integrity verification.
How many analog-to-digital converters does STM32F302RET7TR integrate, and what are their key capabilities?
It integrates two independent 12-bit ADCs with up to 18 input channels total, 0.20 µs conversion time, and selectable resolution (6/8/10/12 bits). Each ADC supports hardware oversampling, injected/conversion sequencing, and external trigger synchronization - enabling simultaneous sampling of current and voltage in motor control applications.
Is STM32F302RET7TR pin-compatible with other STM32F3 devices in the LQFP64 package?
Yes, it shares identical pinout with STM32F302RDT6, STM32F302R8T6, and STM32F303RET7 in LQFP64 - allowing drop-in replacement within the same density and feature subset; however, firmware must verify peripheral enablement and clock configuration due to differences in Flash size and optional features like CCM RAM.
STM32F302RET7TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 64-LQFP
- Series:
- STM32F3
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M4
- Core Size:
- 32-Bit Single-Core
- Speed:
- 72MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, SPI, UART/USART, USB
- Peripherals:
- DMA, I2S, POR, PWM, WDT
- Number of I/O:
- 51
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 64K x 8
- Voltage - Supply (Vcc/Vdd):
- 2V ~ 3.6V
- Data Converters:
- A/D 16x12b; D/A 1x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32F302RET7TR FAQ
1.How can I place an order for STM32F302RET7TR through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32F302RET7TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32F302RET7TR reliable?
The price and inventory of STM32F302RET7TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32F302RET7TR is usually 5 days.
3.What payment methods are accepted for STM32F302RET7TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32F302RET7TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32F302RET7TR?
STM32F302RET7TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32F302RET7TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32F302RET7TR?
For technical support, including STM32F302RET7TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32F302RET7TR requirements.
6.How does Aetrix verify that STM32F302RET7TR is sourced from the original manufacturer or authorized distributors?
All STM32F302RET7TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32F302RET7TR meets industry standards.
7.What is the process for return or replacement of STM32F302RET7TR?
All STM32F302RET7TR units undergo pre-shipment inspection (PSI). If there is an issue with STM32F302RET7TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32F302RET7TR part is unused and in its original packaging.
Return procedure for STM32F302RET7TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32F302RET7TR Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

