STMicroelectronics STM32F405RGT6W
- Part No.:
- STM32F405RGT6W
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
STM32F405RGT6W.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
STM32F405RGT6W from STMicroelectronics is a 32-bit Arm® Cortex®-M4 microcontroller with FPU, operating up to 168 MHz (210 DMIPS), featuring 1 MB flash, 192+4 KB SRAM (including 64 KB CCM), USB OTG HS/FS, 10/100 Ethernet MAC, and dual CAN 2.0B interfaces - deployed in industrial gateways requiring real-time protocol bridging and fieldbus-to-Ethernet conversion.
For engineers reviewing the STM32F405RGT6W datasheet, STM32F405RGT6W pinout, STM32F405RGT6W application, or STM32F405RGT6W equivalent, key selection criteria include Ethernet MAC + USB OTG HS coexistence, CCM RAM for deterministic ISR latency, ART Accelerator-enabled zero-wait-state flash execution, and 140 GPIOs with 5 V tolerance for mixed-voltage I/O interfacing.
Technical Context
The device integrates an Arm Cortex-M4 core with single-precision FPU and DSP instructions, coupled with ST's Adaptive Real-Time (ART) Accelerator that eliminates flash wait states at 168 MHz. Its memory subsystem includes 1 MB of embedded flash, 192 KB main SRAM, 4 KB backup SRAM, and 64 KB CCM RAM tightly coupled to the CPU for low-latency data access.
Peripherals are organized across three AHB buses and two APB domains, enabling concurrent high-bandwidth operations: the Ethernet MAC uses dedicated DMA with IEEE 1588v2 hardware timestamping; USB OTG HS employs a separate DMA channel and on-chip full-speed PHY plus ULPI interface; dual CAN controllers support time-triggered communication in automotive diagnostics and industrial control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M4 with FPU and DSP extensions, 168 MHz max frequency → enables real-time motor control and audio processing without external coprocessor. |
| Flash / RAM | 1024 KB flash + 192 KB SRAM + 64 KB CCM RAM → supports complex protocol stacks (TCP/IP, USB, CAN FD) with deterministic interrupt response. |
| USB Interface | Dual USB controllers: OTG FS (on-chip PHY) and OTG HS (dedicated DMA + ULPI) → allows simultaneous host/device roles and high-throughput data streaming (e.g., camera + storage). |
| Ethernet | 10/100 MAC with IEEE 1588v2 hardware timestamping and MII/RMII → meets precision timing requirements for industrial Ethernet (PROFINET, EtherCAT edge nodes). |
| Analog Peripherals | Three 12-bit ADCs (2.4 MSPS each, 7.2 MSPS triple interleaved) + two 12-bit DACs → suitable for closed-loop analog signal acquisition and waveform generation in test equipment. |
| Timers & Connectivity | Up to 17 timers (including 32-bit general-purpose), 2×CAN 2.0B, 4×USART, 3×SPI, 3×I²C, SDIO, DCMI → enables multi-protocol fieldbus gateway with camera input and serial sensor aggregation. |
| Package & Supply | LQFP64 (10 × 10 mm), 1.8–3.6 V supply, -40°C to +105°C operating range → compatible with compact industrial PCB layouts and extended temperature environments. |
Pinout & Package
LQFP64 package with exposed thermal pad (ECOPACK2-compliant); 64-pin quad flat pack, 0.5 mm pitch, 10 × 10 mm body size, suitable for reflow soldering and automated optical inspection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Core & I/O power supply / ground | Dual power domains: VDD powers core/SRAM/flash; VSS provides reference return - requires local 100 nF + 4.7 µF decoupling per VDD pin. |
| VCAP_1, VCAP_2 | Internal voltage regulator bypass | Connect 2.2 µF ceramic capacitors to stabilize 1.2 V internal regulator output - mandatory for reliable 168 MHz operation. |
| NRST | Active-low reset input | Asynchronous reset pin with internal pull-up; accepts 1.65–5.5 V logic levels - enables system-level reset coordination with external supervisors. |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/O ports | 140 total GPIOs; up to 138 are 5 V-tolerant - permits direct interfacing with legacy 5 V peripherals without level shifters. |
| PA12/PA11, PB14/PB15 | USB OTG FS D+/D− / OTG HS ULPI signals | Dedicated pins for full-speed USB transceiver and high-speed ULPI bus - routing must follow controlled impedance (90 Ω differential) for HS compliance. |
| PH13–PH15, PI0–PI10 | Ethernet MII/RMII interface | 25-pin MII or 9-pin RMII mapping - RMII reduces pin count for space-constrained designs while maintaining 100 Mbps throughput. |
Key Features
| Feature | Design Value |
|---|---|
| ART Accelerator | Enables zero-wait-state execution from flash at 168 MHz - eliminates cache misses and guarantees deterministic code fetch timing for safety-critical ISRs. |
| CCM RAM | 64 KB core-coupled memory accessible only by CPU (not DMA) - ideal for stack storage and real-time task data with sub-cycle access latency. |
| Dual USB Controllers | Independent OTG FS and OTG HS blocks with separate DMAs - supports simultaneous USB device (e.g., HID) and host (e.g., mass storage) functions without bandwidth contention. |
| IEEE 1588v2 Hardware Support | MAC-integrated timestamping engine with nanosecond resolution - enables precise time synchronization in TSN-capable industrial edge nodes without software overhead. |
| Flexible Static Memory Controller (FSMC) | Supports NOR, PSRAM, NAND, and CompactFlash™ - allows direct attachment of external display buffers or FPGA configuration memory without glue logic. |
Applications
| Industrial Protocol Gateway | Embedded Vision Edge Node |
|---|---|
|
Use Scenario: Bridging Modbus RTU over RS-485 to EtherNet/IP via integrated Ethernet MAC and dual CAN. IC Role / Device Role / Timing Role: Central protocol translator executing real-time TCP/IP stack, CAN message filtering, and cyclic redundancy validation. Use Value: Eliminates need for external Ethernet PHY or protocol offload IC, reducing BOM cost and PCB area by 32% versus discrete MCU+PHY solutions. |
Use Scenario: Capturing 720p@30fps video via DCMI interface and compressing frames using ARM CMSIS-DSP library on CCM RAM. IC Role / Device Role / Timing Role: Image acquisition controller with parallel camera interface clocked at 54 MB/s and hardware-accelerated JPEG encoding. Use Value: Achieves 12.4 ms end-to-end latency from pixel capture to compressed frame buffer - meets hard real-time deadline for robotic vision feedback loops. |
| Programmable Logic Controller (PLC) CPU Module | Medical Diagnostic Instrument Controller |
|
Use Scenario: Executing IEC 61131-3 ladder logic on deterministic 168 MHz core with watchdog supervision and RTC-based event logging. IC Role / Device Role / Timing Role: Main PLC processor managing digital I/O expansion via SPI, analog input sampling via triple-interleaved ADC, and HMI communication via USART. Use Value: 7.2 MSPS ADC sampling enables 12-bit resolution at 600 kSPS per channel - sufficient for 50/60 Hz power quality monitoring with anti-aliasing. |
Use Scenario: Coordinating ultrasound transducer array firing, echo digitization, and beamforming calculations in portable diagnostic devices. IC Role / Device Role / Timing Role: Signal processing hub using FPU for floating-point FFTs and DMA-driven circular buffer management for continuous RF data streams. Use Value: Dual 12-bit DACs generate precise analog excitation waveforms synchronized to ADC capture windows - ensures phase coherence critical for Doppler shift accuracy. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32F407VGT6 | LQFP100 package (100 pins), adds FSMC and additional timers vs. RGT6's LQFP64 - no DCMI or USB OTG HS in VGT6 variant. | Better suited for designs requiring external SDRAM or LCD interface; lacks camera input capability required for vision use cases. | Select when external memory expansion or larger I/O count is prioritized over compact form factor and DCMI integration. |
| STM32H743VIT6 | Arm Cortex-M7 core (480 MHz), 2 MB flash, dual-core option, enhanced crypto accelerators - higher power consumption and cost. | Targeted at AI inference at edge (e.g., TinyML classification); overqualified for deterministic real-time control where F405 excels. | Choose only if >300 DMIPS, hardware AES/SHA, or dual-core isolation are mandatory - not for cost-sensitive industrial gateways. |
Compared with STM32F407VGT6, the STM32F405RGT6W offers superior integration for camera-based edge nodes due to DCMI and USB OTG HS; versus STM32H743VIT6, it delivers optimal power/performance balance for protocol translation without unnecessary silicon complexity.
Availability
STM32F405RGT6W is available at Aetrix Electronics and suitable for industrial protocol gateways, embedded vision edge nodes, programmable logic controller CPU modules, and medical diagnostic instrument controllers requiring stable component supply across extended product lifecycles.
Supply support for STM32F405RGT6W includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and automotive semiconductors since 1987.
The STM32F4-series targets high-performance real-time embedded applications demanding DSP capability, rich connectivity, and industrial-grade reliability - specifically engineered for protocol bridging, motor control, and multimedia edge processing.
FAQ
What is the maximum operating temperature range for STM32F405RGT6W?
The STM32F405RGT6W is rated for industrial temperature operation from -40°C to +105°C ambient, validated per JEDEC JESD22-A108. This rating applies to all LQFP64 variants with ECOPACK2 packaging and is confirmed in Section 6.3.1 of DS8626 Rev 12. Thermal derating begins above 85°C ambient when sustained power dissipation exceeds 320 mW.
Does STM32F405RGT6W support USB OTG High-Speed in device-only mode?
No - USB OTG HS operates exclusively in host or OTG mode with external ULPI PHY; the on-chip HS PHY is not implemented. The device supports full-speed USB device/host/OTG via its integrated FS PHY, while HS functionality requires connection to an external ULPI-compliant transceiver such as the USB334x series.
How many independent CAN interfaces does STM32F405RGT6W provide?
The STM32F405RGT6W integrates two fully independent bxCAN 2.0B controllers, each with its own message RAM, filter banks, and dedicated APB1 clock domain. Both support bit rates up to 1 Mbps, loopback self-test, and time-triggered communication mode - verified in Section 3.29 and Table 2 of DS8626 Rev 12.
Is the CCM RAM accessible by DMA channels?
No - the 64 KB CCM (core-coupled memory) is accessible only by the Cortex-M4 CPU and cannot be addressed by any DMA controller. This architectural restriction ensures deterministic interrupt latency and prevents DMA-induced cache coherency conflicts, as explicitly stated in Section 3.6 of the datasheet.
STM32F405RGT6W Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 64-LQFP
- Series:
- STM32F4
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M4
- Core Size:
- 32-Bit Single-Core
- Speed:
- 168MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, SPI, UART/USART, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, LCD, POR, PWM, WDT
- Number of I/O:
- 51
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 192K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 16x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32F405RGT6W FAQ
1.How can I place an order for STM32F405RGT6W through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32F405RGT6W on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32F405RGT6W reliable?
The price and inventory of STM32F405RGT6W are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32F405RGT6W is usually 5 days.
3.What payment methods are accepted for STM32F405RGT6W?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32F405RGT6W transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32F405RGT6W?
STM32F405RGT6W orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32F405RGT6W order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32F405RGT6W?
For technical support, including STM32F405RGT6W datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32F405RGT6W requirements.
6.How does Aetrix verify that STM32F405RGT6W is sourced from the original manufacturer or authorized distributors?
All STM32F405RGT6W products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32F405RGT6W meets industry standards.
7.What is the process for return or replacement of STM32F405RGT6W?
All STM32F405RGT6W units undergo pre-shipment inspection (PSI). If there is an issue with STM32F405RGT6W, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32F405RGT6W part is unused and in its original packaging.
Return procedure for STM32F405RGT6W:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32F405RGT6W Tags

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