STMicroelectronics STM32F407IEH6TR
- Part No.:
- STM32F407IEH6TR
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 201-UFBGA
- Datasheet:
-
STM32F407IEH6TR.pdf
- Description:
- IC MCU 32BIT 512KB FLSH 176UFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:2,698
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32F407IEH6TR from STMicroelectronics is a high-performance Arm® Cortex®-M4 32-bit microcontroller with FPU, operating up to 168 MHz (210 DMIPS), featuring 512 KB flash memory, 192+4 KB SRAM (including 64 KB CCM), dual CAN 2.0B interfaces, 10/100 Ethernet MAC with IEEE 1588v2 hardware support, and USB OTG HS/FS controllers - deployed in industrial gateways requiring real-time protocol bridging and deterministic network timing.
For engineers reviewing the STM32F407IEH6TR datasheet, STM32F407IEH6TR pinout, STM32F407IEH6TR application, or STM32F407IEH6TR equivalent, key selection criteria include Ethernet MAC + IEEE 1588v2 hardware timestamping capability, triple 12-bit ADCs (7.2 MSPS interleaved), camera interface (DCMI) bandwidth up to 54 MB/s, and 138 5 V-tolerant I/Os for mixed-voltage system interfacing.
Technical Context
The STM32F407IEH6TR integrates an Adaptive Real-Time (ART) Accelerator enabling zero-wait-state execution from flash at 168 MHz, alongside a multi-AHB bus matrix for concurrent peripheral access. Its memory subsystem includes 64 KB core-coupled memory (CCM) for time-critical code/data and 512 KB of embedded flash with ECC and 20-year data retention.
It implements dual USB OTG controllers - one full-speed with on-chip PHY, one high-speed with dedicated DMA and ULPI support - plus a 10/100 Ethernet MAC with MII/RMII physical layer interface, hardware-accelerated IEEE 1588v2 timestamping, and integrated DMA for deterministic packet handling without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M4 with FPU, 168 MHz max frequency, 210 DMIPS performance |
| Flash Memory | 512 KB embedded flash with ECC, 20-year data retention, 100k write/erase cycles |
| SRAM | 192 KB main SRAM + 4 KB backup SRAM + 64 KB CCM RAM for critical ISR/data |
| ADC | Three 12-bit ADCs, 2.4 MSPS each; 7.2 MSPS in triple interleaved mode across 24 channels |
| Ethernet | 10/100 MAC with IEEE 1588v2 hardware timestamping, MII/RMII interface, dedicated DMA |
| USB | Dual OTG: FS controller with on-chip PHY; HS controller with ULPI support and dedicated DMA |
| Camera Interface | 8–14-bit parallel DCMI supporting up to 54 MB/s throughput for real-time image capture |
| I/O Pins | 140 total GPIOs; 138 are 5 V-tolerant, 136 support up to 84 MHz toggle rate |
Pinout & Package
LQFP176 (24 × 24 mm) package with 176-pin quad flat pack, 0.5 mm pitch, ECOPACK2-compliant, thermal pad exposed on underside for enhanced heat dissipation in continuous Ethernet/USB HS operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Power supply inputs | Separate analog (VDDA), digital core (VDD), and I/O (VDDIO2) rails enable noise isolation for ADC/DAC and robust 5 V-tolerant I/O operation |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/O banks | 140 GPIOs grouped into 11 ports (A–K), each with configurable pull-up/down, alternate function remapping, and interrupt capability |
| PH0/PH1 | HSE oscillator input/output | 4–26 MHz external crystal connection for precise system clock generation and RTC calibration reference |
| PA12/PA11 | USB OTG FS D+/D− | Dedicated full-speed USB transceiver pins with internal pull-up; no external PHY required |
| PA13/PA14/PA15 | SWD debug interface | Serial Wire Debug (SWD) port using SWDIO, SWCLK, and NRST for low-pin-count in-circuit debugging |
| PC1/PC4/PC5 | Ethernet RMII signals | RMII interface pins (REF_CLK, RXD0, RXD1) enabling compact 10/100 Ethernet implementation with external PHY |
| PD3/PD4/PD5/PD6 | DCMI data bus (D0–D7) | 8-bit parallel camera interface lane supporting 54 MB/s burst transfer for real-time sensor streaming |
Key Features
| Feature | Design Value |
|---|---|
| ART Accelerator | Enables zero-wait-state 168 MHz execution from flash, eliminating cache miss penalties in deterministic real-time loops |
| IEEE 1588v2 Hardware Timestamping | Dedicated timestamp registers and event capture logic in Ethernet MAC for sub-microsecond PTP synchronization accuracy |
| Triple Interleaved ADC Mode | Simultaneous sampling across three 12-bit ADCs achieves 7.2 MSPS aggregate rate for high-fidelity motor current sensing |
| CCM RAM | 64 KB tightly coupled memory accessible only by CPU (not DMA), ideal for stack and latency-critical ISR variables |
| Flexible Static Memory Controller (FSMC) | Supports NOR/NAND/PSRAM with wait-state programmability - enables direct interface to external displays or FPGA co-processors |
| True Random Number Generator (RNG) | NIST SP800-90B compliant entropy source used for secure key generation in TLS/DTLS stack implementations |
Applications
| Industrial Ethernet Gateway | Real-Time Machine Vision Edge Node |
|---|---|
|
Use Scenario: Protocol translation between Modbus TCP, EtherNet/IP, and PROFINET over a single hardware platform. IC Role / Device Role / Timing Role: Primary MCU executing real-time stack scheduling, Ethernet frame processing, and dual-CAN fieldbus bridging with IEEE 1588v2 hardware timestamping. Use Value: Eliminates need for external timestamping ASIC; enables <1 µs PTP sync jitter in motion control networks. |
Use Scenario: On-device preprocessing of 720p@30fps camera streams before cloud upload or local inference. IC Role / Device Role / Timing Role: DCMI receiver with DMA-to-SRAM pipeline, running OpenMV-compatible firmware and hardware-accelerated image filtering. Use Value: 54 MB/s DCMI bandwidth sustains full-rate sensor streaming while freeing CPU for lightweight CNN inference. |
| Secure Remote HMI Terminal | Multi-Protocol Industrial Router |
|
Use Scenario: Touch-enabled operator interface with encrypted OTA updates and secure boot verification. IC Role / Device Role / Timing Role: Host processor managing LCD parallel interface (8080 mode), capacitive touch controller, and TLS 1.2 stack via hardware RNG and AES accelerator. Use Value: 96-bit unique ID and OTP memory enable device identity binding; CCM RAM isolates secure boot code from runtime corruption. |
Use Scenario: Field-deployable router connecting legacy RS-485 devices to MQTT-based cloud infrastructure. IC Role / Device Role / Timing Role: Dual-CAN + USB OTG HS host + SDIO card interface coordinator, managing simultaneous protocol stacks with priority-based IRQ nesting. Use Value: 15 communication interfaces (3×I²C, 4×USART, 3×SPI, 2×CAN, SDIO, USB, Ethernet) consolidate connectivity onto one die, reducing BOM count by 4+ ICs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-performance ARM Cortex-M4 microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32F407VGT6 | LQFP100 package (100 pins); 1 MB flash, same peripherals but fewer GPIOs (82 vs. 140) and no DCMI | Suitable for space-constrained designs where Ethernet + USB FS suffices, but lacks camera interface and 5 V-tolerant I/O count | Select when board area is limited and DCMI/5 V-tolerance are not required; verify pin compatibility for existing LQFP100 footprints |
| STM32F767ZIT6 | Cortex-M7 core @ 216 MHz; 2 MB flash, 512 KB RAM; adds FMC, Chrom-ART accelerator, and crypto/hash accelerators | Better suited for GUI-rich HMIs or cryptographic gateway functions; higher power and cost; no native IEEE 1588v2 hardware support | Choose for applications needing >200 MHz compute headroom or hardware crypto, but accept trade-offs in power, cost, and missing 1588v2 timestamping logic |
Compared with STM32F407VGT6, the STM32F407IEH6TR provides 40+ additional GPIOs, DCMI, and 5 V-tolerant I/Os essential for sensor aggregation; versus STM32F767ZIT6, it delivers deterministic IEEE 1588v2 timestamping at lower power and cost - critical for time-sensitive industrial networking.
Availability
STM32F407IEH6TR is available at Aetrix Electronics and suitable for industrial gateways, real-time machine vision edge nodes, secure remote HMI terminals, and multi-protocol industrial routers requiring stable component supply across extended product lifecycles.
Supply support for STM32F407IEH6TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in microcontrollers, power management, sensors, and automotive ICs with vertical manufacturing and long-term product longevity commitments.
The STM32F4-series targets high-end embedded applications demanding real-time determinism, rich connectivity, and analog integration - designed specifically for industrial automation, motor control, and networked edge devices.
FAQ
What is the maximum operating temperature range for STM32F407IEH6TR?
The STM32F407IEH6TR is rated for industrial temperature range: –40 °C to +85 °C ambient, validated per JEDEC JESD22-A104. Thermal derating begins above 70 °C ambient when operating at 168 MHz with Ethernet and USB HS active; PCB layout must include thermal vias under the exposed pad for sustained performance.
Does STM32F407IEH6TR support hardware encryption acceleration?
No - the STM32F407IEH6TR does not include dedicated AES, DES, or SHA hardware accelerators. It relies on software libraries (e.g., mbed TLS) for cryptographic operations. For hardware-accelerated crypto, consider STM32F417x or STM32F7xx families, which integrate Crypto Processor (CRYP) and Hash modules.
Can the Ethernet MAC operate without an external PHY?
No - the STM32F407IEH6TR integrates only the Media Access Control (MAC) layer. An external PHY (e.g., LAN8720A or DP83848) is required for physical layer signaling (10/100BASE-TX). The RMII interface uses five signals (REF_CLK, CRS_DV, RXD0/1, TX_EN, TXD0/1) and supports both MII and RMII modes via configuration bits.
How many independent PWM outputs can be generated simultaneously?
The STM32F407IEH6TR supports up to 36 independent PWM outputs: twelve 16-bit timers (TIM2–TIM5, TIM9–TIM14) and two 32-bit timers (TIM1/TIM8), each offering up to four complementary PWM channels with dead-time insertion - sufficient for three-phase motor control, LED dimming, and digital power supply regulation concurrently.
STM32F407IEH6TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 201-UFBGA
- Series:
- STM32F4
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M4
- Core Size:
- 32-Bit Single-Core
- Speed:
- 168MHz
- Connectivity:
- CANbus, DCMI, EBI/EMI, Ethernet, I2C, IrDA, LINbus, SPI, UART/USART, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, LCD, POR, PWM, WDT
- Number of I/O:
- 140
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 192K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 24x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32F407IEH6TR FAQ
1.How can I place an order for STM32F407IEH6TR through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32F407IEH6TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32F407IEH6TR reliable?
The price and inventory of STM32F407IEH6TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32F407IEH6TR is usually 5 days.
3.What payment methods are accepted for STM32F407IEH6TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32F407IEH6TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32F407IEH6TR?
STM32F407IEH6TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32F407IEH6TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32F407IEH6TR?
For technical support, including STM32F407IEH6TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32F407IEH6TR requirements.
6.How does Aetrix verify that STM32F407IEH6TR is sourced from the original manufacturer or authorized distributors?
All STM32F407IEH6TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32F407IEH6TR meets industry standards.
7.What is the process for return or replacement of STM32F407IEH6TR?
All STM32F407IEH6TR units undergo pre-shipment inspection (PSI). If there is an issue with STM32F407IEH6TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32F407IEH6TR part is unused and in its original packaging.
Return procedure for STM32F407IEH6TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32F407IEH6TR Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

