STMicroelectronics STM32G051F8Y6TR

Overview

STM32G051F8Y6TR from STMicroelectronics is a 32-bit Arm® Cortex®-M0+ microcontroller in a 20-pin TSSOP package, featuring 64 KB Flash, 18 KB SRAM, dual USARTs (one with LIN/ISO7816), two 12-bit DACs, and 12-bit ADC with hardware oversampling-designed for compact industrial sensor nodes and battery-powered IoT edge controllers.

For engineers reviewing the STM32G051F8Y6TR datasheet, STM32G051F8Y6TR pinout, STM32G051F8Y6TR application, or STM32G051F8Y6TR equivalent, key selection criteria include its 64 MHz max CPU frequency, 1.7–3.6 V supply range, -40°C to 125°C extended temperature grade, and integrated low-power timers with Stop/Standby wakeup via LPUART or RTC alarm.

Technical Context

The device implements an Arm Cortex-M0+ core with MPU, supporting TrustZone-like memory protection through securable flash area and readout protection levels. Its clock system integrates four oscillators: 4–48 MHz HSE, 32 kHz LSE with calibration, 16 MHz HSI with PLL, and 32 kHz LSI-enabling precise timing control across Run, Stop, and Standby modes.

Peripheral interconnect uses a multi-layer AHB/APB bus matrix with DMAMUX for flexible channel mapping. Analog subsystem includes rail-to-rail comparators with programmable hysteresis, dual DACs with sample-and-hold, and ADC with up to 16 external channels and 0.4 µs conversion time-optimized for real-time signal acquisition in resource-constrained embedded systems.

Key Specifications

Pinout & Package

STM32G051F8Y6TR is housed in a 20-pin TSSOP package (6.4 × 4.4 mm, pitch 0.65 mm), RoHS-compliant and ECOPACK2 certified. Pin functions are validated per ST's DS13303 Rev 4, Section 4 (Pin assignment and description), with all I/Os 5 V-tolerant except BOOT0 and NRST.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Compared with STM32G031F8P6, STM32G051F8Y6TR adds critical analog output capability and extended temperature resilience; versus STM32G071F8Y6TR, it trades USB and RAM headroom for lower static power and smaller footprint-ideal for sealed, battery-operated edge nodes.

Availability

STM32G051F8Y6TR is available at Aetrix Electronics and suitable for industrial sensor nodes, smart metering endpoints, and automotive body electronics requiring stable component supply across extended temperature ranges and long product lifecycles.

Supply support for STM32G051F8Y6TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, and MEMS sensors for industrial, automotive, and consumer markets.

The STM32G0 series targets cost-sensitive, ultra-low-power embedded applications-delivering Cortex-M0+ performance with enhanced analog integration and simplified security features for rapid IoT endpoint development.

FAQ

What is the maximum operating frequency and how is it achieved?

The STM32G051F8Y6TR achieves 64 MHz CPU frequency using its internal 16 MHz HSI oscillator fed into a programmable PLL with multiplication factor up to ×4. This configuration avoids external crystal cost while maintaining timing accuracy within ±1% over temperature, validated per DS13303 Section 5.3.9.

Does this MCU support hardware encryption or secure boot?

It does not include dedicated AES or PKA accelerators, but supports secure firmware deployment via readout protection (RDP) Level 1/2, securable flash area, and 96-bit unique ID for key derivation. Bootloader authentication requires external secure element or software-based HMAC verification using the CRC unit.

Can the two DAC outputs be synchronized for differential signaling?

No-DAC1 and DAC2 operate independently with separate trigger sources and output buffers. They cannot be hardware-synchronized for true differential pair generation; however, software-triggered updates with tight timing loops achieve <1 µs skew in most use cases per DS13303 Section 3.15.

What debug interfaces are supported and what pins do they use?

Only Serial Wire Debug (SWD) is supported, using dedicated pins SWDIO (PA13) and SWCLK (PA14). JTAG is not implemented. These pins are shared with GPIO functionality but default to debug mode on reset; no external pull-ups are required for standard SWD programmers like ST-LINK/V2.