STMicroelectronics STM32G0B1CCU6
- Part No.:
- STM32G0B1CCU6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 48-UFQFN Exposed Pad
- Datasheet:
-
STM32G0B1CCU6.pdf
- Description:
- IC MCU 32BIT 256KB FLSH 48UFQFPN
- Quantity:
- Payment:

- Shipping:

Inventory:2,789
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32G0B1CCU6 from STMicroelectronics is a 32-bit Arm® Cortex®-M0+ microcontroller operating up to 64 MHz, featuring 512 KB flash with dual-bank read-while-write, 144 KB SRAM (128 KB with hardware parity), and integrated USB 2.0 FS device/host, two FDCAN controllers, and USB Type-C™ Power Delivery controller. It targets industrial control, smart metering, and USB-C peripheral systems requiring secure firmware execution and low-power operation down to -40°C to 125°C.
For engineers reviewing the STM32G0B1CCU6 datasheet, STM32G0B1CCU6 pinout, STM32G0B1CCU6 application, or STM32G0B1CCU6 equivalent, key selection criteria include dual-bank flash security, 94 fast I/Os with 5 V tolerance, 12-bit ADC with 16-channel support, two 12-bit DACs, and FDCAN/USB-C PD integration for embedded power negotiation and real-time communication.
Technical Context
The STM32G0B1CCU6 implements an Arm Cortex-M0+ core with Memory Protection Unit (MPU) for task isolation and secure boot enforcement. Its flash memory supports securable areas, read-while-write, and hardware CRC acceleration for firmware integrity verification.
Power architecture includes programmable Brownout Reset (BOR), voltage detector (PVD), and four low-power modes (Sleep, Stop, Standby, Shutdown) with RTC and backup registers powered by VBAT. Clock system integrates 4–48 MHz HSE, 32 kHz LSE with calibration, and internal 48 MHz RC oscillator enabling crystal-less USB operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M0+, 64 MHz max - enables deterministic real-time control with low interrupt latency. |
| Flash Memory | 512 KB, dual-bank, read-while-write - supports seamless firmware updates without halting execution. |
| SRAM | 144 KB total (128 KB with HW parity) - provides robust data buffering and safety-critical variable storage. |
| ADC | 12-bit, 0.4 µs conversion, up to 16 external channels - delivers high-speed analog sensing for motor control or sensor fusion. |
| DACs | Two 12-bit DACs with sample-and-hold - enables precise analog waveform generation or reference voltage synthesis. |
| FDCAN | Two FDCAN controllers compliant with ISO 11898-1:2015 - supports flexible data-rate CAN for automotive and industrial networks. |
| USB | USB 2.0 FS device/host + USB Type-C™ PD controller - enables plug-and-play connectivity and bidirectional power negotiation. |
| Operating Temp | -40°C to +125°C - qualified for extended industrial and under-hood automotive environments. |
Pinout & Package
STM32G0B1CCU6 uses the UFQFPN48 (7 × 7 mm) package with 48 pins, ECOPACK2-compliant, optimized for compact PCB layouts and thermal performance in space-constrained applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Core power supply / ground | 1.7–3.6 V main supply; separate VDDA/VSSA required for analog peripherals. |
| PA0–PA15, PB0–PB15, PC0–PC15, PD0–PD15, PE0–PE15, PF0–PF1 | General-purpose I/Os | Up to 94 GPIOs; most are 5 V-tolerant and mappable to EXTI lines for wake-up or event triggering. |
| PA9/PA10, PB6/PB7, PB10/PB11 | USART TX/RX | Support LIN, IrDA, auto baud rate detection; three USARTs include ISO7816 interface for smart card readers. |
| PA11/PA12 | USB DM/DP | Crystal-less USB 2.0 FS interface - eliminates external oscillator, reducing BOM cost and board area. |
| PD0/PD1 | FDCAN1 TX/RX | Differential CAN bus interface with built-in transceiver support and loopback mode for diagnostics. |
| PE5/PE6 | FDCAN2 TX/RX | Second independent CAN FD interface - enables redundant or multi-network topologies in industrial gateways. |
| PA0 | ADC1_IN0 / TAMP1 | Analog input channel 0 or tamper detection pin - supports secure boot monitoring and analog sensor acquisition on same pin. |
| VBAT | Backup power supply | Supplies RTC and backup registers during main power loss - enables calendar timekeeping and non-volatile state retention. |
Key Features
| Feature | Design Value |
|---|---|
| Secure Flash Area | Dual-bank flash with securable region - prevents unauthorized firmware readout and enforces trusted boot sequences. |
| Low-Power Timers | LPTIM1/LPTIM2 with sub-microamp active current - maintains timing accuracy in Stop/Standby modes for battery-powered wake-up scheduling. |
| USB-C PD Controller | Integrated Type-C Power Delivery PHY and protocol engine - handles VCONN switching, SOP message exchange, and power role negotiation without external IC. |
| Analog Comparators | Three rail-to-rail comparators with programmable hysteresis and output routing - replaces discrete comparator circuits in overvoltage/undervoltage protection designs. |
| CRC Calculation Unit | Hardware-accelerated CRC-32 generator - offloads checksum computation from CPU for OTA update validation and data packet integrity. |
| Memory Protection Unit | MPU supporting eight regions with configurable access permissions - isolates RTOS tasks and prevents stack overflow corruption across critical firmware modules. |
Applications
| Smart Energy Metering | Industrial PLC I/O Module |
|---|---|
Use Scenario: Bidirectional energy measurement with tariff switching, tamper detection, and remote firmware updates via cellular or LoRaWAN. IC Role / Device Role / Timing Role: Main application processor handling metrology calculations, secure bootloader, and USB-C PD for field technician configuration. Use Value: Dual-bank flash enables safe A/B firmware updates; 125°C rating ensures reliability in sealed outdoor enclosures. | Use Scenario: Modular digital input/output expansion unit with CAN FD backbone, isolated analog inputs, and local HMI control. IC Role / Device Role / Timing Role: Central I/O coordinator managing 94 GPIOs, two FDCAN interfaces for network redundancy, and 12-bit ADC/DAC for analog signal conditioning. Use Value: 5 V-tolerant I/Os simplify level-shifting design; hardware parity on 128 KB SRAM meets SIL-2 functional safety requirements. |
| USB-C Powered Peripherals | Motor Control Gateway |
Use Scenario: Portable medical device (e.g., infusion pump) requiring USB-C charging, data logging, and regulatory-compliant power negotiation. IC Role / Device Role / Timing Role: System-on-chip managing USB-C PD policy engine, battery charge control, and real-time motor actuation via PWM timers. Use Value: Integrated USB-C PD controller eliminates external PMIC; crystal-less USB reduces component count and EMI risk. | Use Scenario: Brushless DC motor gateway connecting Hall sensors, current shunts, and CAN FD to cloud-connected edge controller. IC Role / Device Role / Timing Role: Real-time motor commutation supervisor using TIM1 advanced timer, FDCAN for status reporting, and ADC oversampling for current sensing. Use Value: 128 MHz capable timer delivers <100 ns PWM resolution; 0.4 µs ADC conversion enables 2.5 MSPS sampling for field-oriented control loops. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32G0B1RCT6 | LQFP64 package (64-pin), 100% pin-compatible but larger footprint and higher I/O count (94 vs. 42) | Suitable for designs needing full I/O access and prototyping flexibility; less optimal for ultra-compact USB-C end devices | Select when board layout allows larger package and maximum peripheral routing headroom is required. |
| STM32G0C1CEU6 | Same UFQFPN48 package, identical peripherals, but 1 MB flash and 192 KB SRAM - no securable flash area or dual-bank RWW | Better for large firmware images without secure boot; lacks flash protection features needed in certified metering or medical applications | Choose when memory capacity outweighs security requirements and certification compliance is not mandated. |
Compared with STM32G0B1CCU6, the STM32G0B1RCT6 offers full I/O access in LQFP64 for development and complex interfacing, while STM32G0C1CEU6 trades flash security and dual-bank RWW for higher memory density - making the G0B1CCU6 optimal for production-grade USB-C PD + FDCAN systems requiring both compactness and certified firmware integrity.
Availability
STM32G0B1CCU6 is available at Aetrix Electronics and suitable for smart energy metering, industrial PLC I/O modules, and USB-C powered peripherals requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for STM32G0B1CCU6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog components for industrial, automotive, and consumer markets.
The STM32G0 series targets cost-sensitive, power-efficient embedded applications demanding Arm Cortex-M0+ performance with advanced security, USB-C integration, and industrial-grade reliability - positioning the G0B1 line for next-generation smart infrastructure endpoints.
FAQ
What is the maximum operating frequency and supported voltage range?
The STM32G0B1CCU6 operates at up to 64 MHz and supports a core supply voltage range of 1.7 V to 3.6 V, with a separate I/O supply range of 1.65 V to 3.6 V. Its internal regulators and voltage detectors ensure stable operation across this range, including brownout reset and programmable voltage detection for system-level power monitoring.
Does it support crystal-less USB operation?
Yes, the STM32G0B1CCU6 integrates a 48 MHz internal RC oscillator (HSI48) with trimming capability, enabling full-speed USB 2.0 device and host functionality without an external crystal. This reduces bill-of-materials cost and simplifies PCB layout while maintaining USB specification compliance.
How many FDCAN interfaces does it include, and what standard do they meet?
The STM32G0B1CCU6 includes two fully independent FDCAN controllers compliant with ISO 11898-1:2015, supporting both classical CAN and CAN FD (Flexible Data-Rate) with bit rates up to 5 Mbit/s. Each controller has dedicated TX/RX pins and supports loopback, self-test, and timestamped message filtering.
Is hardware parity implemented on all SRAM, and what is its purpose?
Hardware parity is implemented on 128 KB of the 144 KB SRAM, providing single-bit error detection for critical data buffers and stack usage. This feature supports functional safety requirements (e.g., IEC 61508 SIL-2) by enabling automatic fault detection and system-level error handling without software overhead.
STM32G0B1CCU6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 48-UFQFN Exposed Pad
- Series:
- STM32G0
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0+
- Core Size:
- 32-Bit Single-Core
- Speed:
- 64MHz
- Connectivity:
- CANbus, HDMI-CEC, I2C, IrDA, LINbus, SPI, UART/USART, USB2.0, USB Type-C™ (Power Delivery)
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, PWM, WDT
- Number of I/O:
- 44
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 144K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.7V ~ 3.6V
- Data Converters:
- A/D 17x12b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32G0B1CCU6 FAQ
1.How can I place an order for STM32G0B1CCU6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32G0B1CCU6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32G0B1CCU6 reliable?
The price and inventory of STM32G0B1CCU6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32G0B1CCU6 is usually 5 days.
3.What payment methods are accepted for STM32G0B1CCU6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32G0B1CCU6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32G0B1CCU6?
STM32G0B1CCU6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32G0B1CCU6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32G0B1CCU6?
For technical support, including STM32G0B1CCU6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32G0B1CCU6 requirements.
6.How does Aetrix verify that STM32G0B1CCU6 is sourced from the original manufacturer or authorized distributors?
All STM32G0B1CCU6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32G0B1CCU6 meets industry standards.
7.What is the process for return or replacement of STM32G0B1CCU6?
All STM32G0B1CCU6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32G0B1CCU6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32G0B1CCU6 part is unused and in its original packaging.
Return procedure for STM32G0B1CCU6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32G0B1CCU6 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
