STMicroelectronics STM32G0B1KBU6TR
- Part No.:
- STM32G0B1KBU6TR
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 32-UFQFN Exposed Pad
- Datasheet:
-
STM32G0B1KBU6TR.pdf
- Description:
- IC MCU 32BIT 128KB FLSH 32UFQFPN
- Quantity:
- Payment:

- Shipping:

Inventory:2,097
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32G0B1KBU6TR from STMicroelectronics is a 32-bit Arm® Cortex®-M0+ microcontroller with 512 KB Flash, 144 KB SRAM, dual 12-bit DACs, two FDCAN controllers, and USB Type-C™ Power Delivery controller - deployed in industrial HMI, smart metering gateways, and USB-C PD-enabled embedded power systems.
For engineers reviewing the STM32G0B1KBU6TR datasheet, STM32G0B1KBU6TR pinout, STM32G0B1KBU6TR application, or STM32G0B1KBU6TR equivalent, key selection criteria include FDCAN timing compliance, USB-C PD controller integration, 125°C extended temperature operation, and dual-bank Flash with read-while-write capability for robust firmware updates.
Technical Context
This MCU integrates an Arm Cortex-M0+ core running up to 64 MHz with MPU, dual-bank Flash supporting atomic firmware swaps, and hardware CRC acceleration. It features a full peripheral interconnect matrix enabling flexible routing of DMA requests and interrupt vectors across 94 GPIOs.
The clock system combines four oscillators (HSE, LSE, HSI16, HSI48) with PLL support and independent low-power timers (LPTIM1/2) synchronized to LSE - enabling precise timekeeping and ultra-low-power wake-up from Stop/Standby modes without external crystal dependency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | Arm Cortex-M0+, 64 MHz max - delivers deterministic real-time control with MPU for memory partitioning. |
| Flash / RAM | 512 KB dual-bank Flash with RWW + 144 KB SRAM (128 KB with HW parity) - enables secure OTA updates and ECC-protected data buffers. |
| ADC | 12-bit, 0.4 µs conversion, 16-channel ext. input - supports fast sensor sampling with hardware oversampling up to 16-bit resolution. |
| DAC | Two 12-bit DACs with sample-and-hold - provides simultaneous analog output for control loops or audio waveform generation. |
| FDCAN | Two ISO 11898-1 compliant controllers with FD mode - enables high-speed automotive-grade communication at up to 5 Mbps. |
| USB | USB 2.0 FS device/host + integrated USB Type-C™ PD controller - eliminates need for external PD PHY in compact power delivery designs. |
| Temp Range | –40°C to +125°C - qualified for under-hood automotive, industrial motor drives, and energy infrastructure applications. |
Pinout & Package
STM32G0B1KBU6TR uses the UFQFPN48 (7 × 7 mm) package with 48-pin layout, ECOPACK2-compliant, and rated for 125°C operation. Pin functions include dedicated FDCAN_RX/TX, USB_DP/DM, VBUS sensing, and dual DAC outputs (PA4/PA5).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD/VSS | Core power supply / ground | 1.7–3.6 V core rail; separate VDDA for analog domain ensures ADC/DAC accuracy. |
| PA4/PA5 | DAC1_OUT1 / DAC2_OUT1 | Dedicated analog outputs with internal buffer - no external op-amp required for basic voltage generation. |
| PD0/PD1 | FDCAN1_RX / FDCAN1_TX | Hardwired CAN FD transceiver interface - supports bit rates up to 5 Mbps with built-in protocol engine. |
| PA11/PA12 | USB_DM / USB_DP | Full-speed USB 2.0 differential pair - crystal-less operation enabled by internal 48 MHz HSI48 oscillator. |
| PC13 | LSE_IN | 32.768 kHz crystal input for RTC and LPTIM - calibrated for ±20 ppm accuracy over temperature. |
| VBAT | Backup power supply | Supplies RTC and backup registers during main power loss - supports battery or supercap operation. |
Key Features
| Feature | Design Value |
|---|---|
| Secure boot with ROP | Readout protection (ROP) levels prevent unauthorized firmware extraction - critical for certified industrial firmware. |
| Hardware crypto accelerator | Dedicated AES-128 engine with DMA offload - accelerates secure boot verification and encrypted communication. |
| USB-C PD controller | Integrated PD PHY + policy engine - handles VCONN switching, SOP' messaging, and voltage negotiation without external IC. |
| Low-power timer (LPTIM) | Two 16-bit LPTIMs clocked by LSE - enable sub-millisecond wake-up from Stop mode with <1 µA consumption. |
| 5 V-tolerant I/Os | Up to 40 pins tolerant to 5 V - simplifies interfacing with legacy peripherals and level-shifting circuits. |
Applications
| Industrial HMI Panel | Smart Energy Gateway |
|---|---|
Use Scenario: Touch-enabled local display with real-time sensor monitoring and local control logic. IC Role / Device Role / Timing Role: Main application processor handling GUI rendering, ADC sampling, and UART-based sensor aggregation. Use Value: Dual DACs drive analog gauges; 144 KB SRAM buffers touch event queues and graphics frame buffers without external memory. | Use Scenario: DIN-rail mounted gateway aggregating Modbus RTU, CAN bus, and pulse-count inputs for utility metering. IC Role / Device Role / Timing Role: Central protocol translator with FDCAN for fieldbus bridging and USB-C PD for field technician configuration. Use Value: Two FDCAN controllers isolate upstream/downstream networks; USB-C PD enables safe, hot-pluggable firmware updates via standard cables. |
| USB-C Power Adapter | Automotive Body Control Module |
Use Scenario: Compact AC-DC adapter negotiating 20 V/5 A delivery using USB-C PD 3.0 specification. IC Role / Device Role / Timing Role: USB-C PD policy engine and power path controller managing VBUS, CC lines, and VCONN switching. Use Value: Integrated PD controller eliminates discrete PD PHY and reduces BOM count; 125°C rating supports enclosed thermal environments. | Use Scenario: Door module controlling window lift, mirror fold, and interior lighting with LIN and CAN interfaces. IC Role / Device Role / Timing Role: Low-power node with LPUART for LIN communication and FDCAN for body network backbone. Use Value: LPTIM wake-up from Standby on door handle sensor input consumes <0.5 µA; 5 V-tolerant I/Os interface directly with 12 V LIN transceivers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32G0B1KBU6 | Tape-and-reel packaging omitted; identical silicon and electrical specs. | No difference - same functional use in all applications. | Select when reel packaging is not required for SMT line setup. |
| STM32G0B1CBT6 | Same die, but in LQFP48 package (10 × 10 mm); lacks USB-C PD controller block. | Suitable for non-USB-C applications requiring larger PCB footprint and easier hand-soldering. | Choose only if USB-C PD functionality is unnecessary and board space allows larger package. |
Compared with STM32G0B1KBU6TR, the KBU6 variant offers identical performance in tape-and-reel form factor, while CBT6 trades USB-C PD integration and compact UFQFPN48 for legacy LQFP48 compatibility - making TR the sole choice for space-constrained, USB-C PD–enabled designs.
Availability
STM32G0B1KBU6TR is available at Aetrix Electronics and suitable for industrial HMI, smart energy gateways, and USB-C PD adapter designs requiring stable component supply, long-term lifecycle assurance, and automotive-grade temperature resilience.
Supply support for STM32G0B1KBU6TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in microcontrollers, power management, and automotive ICs with strong industrial and automotive qualification heritage.
The STM32G0 series targets cost-sensitive, high-integration embedded applications demanding USB-C PD, FDCAN, and extended temperature operation - optimized for rapid development with STM32Cube ecosystem support.
FAQ
Does STM32G0B1KBU6TR support USB-C Power Delivery sink-only or source/sink operation?
STM32G0B1KBU6TR supports full USB-C Power Delivery 3.0 dual-role operation - including source, sink, and DRP (dual-role port) modes - with integrated CC logic, VCONN switching, and SOP message handling. Its PD controller implements the complete policy engine per USB-IF specifications, eliminating need for external PD microcontroller.
What is the maximum operating frequency of the FDCAN controllers on this MCU?
The two FDCAN controllers operate at up to 5 Mbps in CAN FD mode, compliant with ISO 11898-1:2015. They support programmable bit timing, loopback self-test, and timestamping with 1 ns resolution - verified across –40°C to +125°C ambient conditions per datasheet Section 5.3.26.
Is the 144 KB SRAM fully accessible at 64 MHz CPU clock speed?
Yes - all 144 KB SRAM is accessible at full 64 MHz CPU speed. The 128 KB portion with hardware parity is mapped to the first bank and supports error detection; the remaining 16 KB (without parity) is available for high-speed DMA buffers or stack overflow margin, with zero wait states at maximum frequency.
How does the dual-bank Flash architecture enable safe firmware updates?
Dual-bank Flash allows one bank to execute code while the other is erased and reprogrammed - enabling atomic firmware updates without halting real-time operation. Bank swapping is controlled via SYSCFG_MEMRMP register, and the securable area prevents rollback to older versions, satisfying IEC 62443-3-3 secure update requirements.
STM32G0B1KBU6TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 32-UFQFN Exposed Pad
- Series:
- STM32G0
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M0+
- Core Size:
- 32-Bit
- Speed:
- 64MHz
- Connectivity:
- CANbus, HDMI-CEC, I2C, IrDA, LINbus, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, PWM, WDT
- Number of I/O:
- 30
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 144K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.7V ~ 3.6V
- Data Converters:
- A/D 13x12b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32G0B1KBU6TR FAQ
1.How can I place an order for STM32G0B1KBU6TR through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32G0B1KBU6TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32G0B1KBU6TR reliable?
The price and inventory of STM32G0B1KBU6TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32G0B1KBU6TR is usually 5 days.
3.What payment methods are accepted for STM32G0B1KBU6TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32G0B1KBU6TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32G0B1KBU6TR?
STM32G0B1KBU6TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32G0B1KBU6TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32G0B1KBU6TR?
For technical support, including STM32G0B1KBU6TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32G0B1KBU6TR requirements.
6.How does Aetrix verify that STM32G0B1KBU6TR is sourced from the original manufacturer or authorized distributors?
All STM32G0B1KBU6TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32G0B1KBU6TR meets industry standards.
7.What is the process for return or replacement of STM32G0B1KBU6TR?
All STM32G0B1KBU6TR units undergo pre-shipment inspection (PSI). If there is an issue with STM32G0B1KBU6TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32G0B1KBU6TR part is unused and in its original packaging.
Return procedure for STM32G0B1KBU6TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32G0B1KBU6TR Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

