STMicroelectronics STM32G484QET6U

Overview

STM32G484QET6U from STMicroelectronics is an Arm® Cortex®-M4 32-bit microcontroller with FPU, operating up to 170 MHz (213 DMIPS), featuring 512 KB Flash with ECC, 96 KB SRAM (including 32 KB CCM-SRAM with parity), and integrated analog peripherals including five 12-bit ADCs (0.25 µs conversion), seven 12-bit DACs, six operational amplifiers, and a high-resolution timer (HRTIM) with 184 ps resolution-designed for precision motor control and digital power conversion.

For engineers reviewing the STM32G484QET6U datasheet, STM32G484QET6U pinout, STM32G484QET6U application, or STM32G484QET6U equivalent, key selection criteria include HRTIM timing precision, dual-bank Flash read-while-write capability, FDCAN FD support, hardware math accelerators (CORDIC/FMAC), and 5 V-tolerant GPIOs in industrial real-time control systems.

Technical Context

The STM32G484QET6U implements an adaptive real-time memory accelerator (ART Accelerator) enabling zero-wait-state execution from Flash at 170 MHz. Its interconnect matrix supports concurrent access to Flash, SRAM, and peripherals without bus contention.

It integrates three FDCAN controllers compliant with ISO 11898-1:2015 (FD mode), a USB 2.0 full-speed interface with LPM/BCD, and a dedicated UCPD controller for USB Type-C™ power delivery negotiation-enabling single-chip USB-C PD sink/source designs with real-time analog feedback.

Key Specifications

Pinout & Package

STM32G484QET6U uses the UFQFPN48 (7 × 7 mm) package with 48 pins, optimized for space-constrained industrial and motor control applications. Pin functions are validated per STMicroelectronics DS12983 Rev 5, Section 4.1.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-performance mixed-signal MCU applications.

Compared with STM32G474RET6, the STM32G484QET6U adds dual-bank Flash RWW and UCPD for field-upgradable USB-C PD sinks; versus STM32H743VIT6, it delivers superior analog integration and 184 ps timing resolution at half the dynamic power-making it optimal for deterministic real-time control with embedded power delivery.

Availability

STM32G484QET6U is available at Aetrix Electronics and suitable for industrial motor drives, digital power supplies, USB-C PD sink controllers, and smart grid edge sensors requiring stable component supply across extended temperature ranges (–40°C to 105°C).

Supply support for STM32G484QET6U includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and automotive-grade components since 1987.

The STM32G4 series targets high-efficiency digital power conversion and precision motor control, integrating specialized analog peripherals, math accelerators, and real-time timers into a single Cortex-M4 platform.

FAQ

What is the maximum operating temperature range for STM32G484QET6U?

The STM32G484QET6U is qualified for industrial temperature range: –40°C to +105°C ambient. This is confirmed in Section 5.3.1 of DS12983 Rev 5, with thermal derating applied above 85°C for sustained 170 MHz operation. The device includes internal temperature sensor calibrated per Table 5.

Does STM32G484QET6U support USB-C Power Delivery source functionality?

No-STM32G484QET6U integrates only the UCPD peripheral for USB-C Power Delivery *sink* and *dual-role* (DRP) operation. It lacks the high-voltage VCONN switch drivers and dedicated source-side policy engine required for standalone source implementation. External companion ICs are needed for full source capability.

How many independent PWM channels does the HRTIM provide?

The HRTIM provides 12 independent PWM outputs across its six 16-bit timers, each configurable with complementary pairs, dead-time insertion, and fault protection. All 12 outputs support 184 ps resolution and synchronous update-verified in Section 3.25.1 and Table 7 of DS12983 Rev 5.

Is the CCM-SRAM accessible by DMA?

No-CCM-SRAM (32 KB) is accessible only by the CPU instruction and data buses; it is excluded from the AHB bus matrix and therefore not visible to DMA controllers. This design enforces deterministic CPU access for time-critical code while preventing DMA-induced latency jitter-documented in Section 3.5 and Figure 12 of DS12983 Rev 5.