STMicroelectronics STM32G491CEU6
- Part No.:
- STM32G491CEU6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 48-UFQFN Exposed Pad
- Datasheet:
-
STM32G491CEU6.pdf
- Description:
- IC MCU 32BIT 512KB FLSH 48UFQFPN
- Quantity:
- Payment:

- Shipping:

Inventory:1,971
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32G491CEU6 from STMicroelectronics is an Arm® Cortex®-M4 32-bit microcontroller with FPU, operating up to 170 MHz (213 DMIPS), featuring 512 KB Flash with ECC, 112 KB SRAM (96 KB + 16 KB CCM), and integrated analog peripherals including three 16-bit ADCs, four 12-bit DACs, four rail-to-rail comparators, and four operational amplifiers. It targets motor control, digital power conversion, and industrial sensing applications requiring real-time math acceleration via CORDIC and FMAC units.
For engineers reviewing the STM32G491CEU6 datasheet, STM32G491CEU6 pinout, STM32G491CEU6 application, or STM32G491CEU6 equivalent, key selection criteria include its 48-pin UFQFPN package, dual FDCAN support for automotive-grade communication, hardware-accelerated trigonometric and filtering functions, and 5 V-tolerant I/Os enabling direct interfacing with legacy logic levels.
Technical Context
The STM32G491CEU6 implements an adaptive real-time accelerator (ART) enabling zero-wait-state execution from Flash at 170 MHz, paired with a memory protection unit (MPU) and securable memory regions including PCROP and 1 KB OTP. Its interconnect matrix routes 16 DMA channels across multiple AHB/APB buses for concurrent peripheral access without arbitration bottlenecks.
It integrates dual FDCAN controllers compliant with ISO 11898-1:2015 (FD mode up to 5 Mbps), USB 2.0 full-speed with LPM/BCD, UCPD for USB Type-C™ power delivery negotiation, and a dedicated low-power timer (LPTIM1) with ultra-low wake-up latency from Stop modes - all synchronized via a flexible clock tree supporting four oscillators (HSE, LSE, HSI, LSI) and PLL configurations.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M4 with FPU and DSP instructions, enabling single-cycle MAC and saturating arithmetic for real-time control loops. |
| Max Clock Frequency | 170 MHz with 213 DMIPS performance, sustained via ART Accelerator eliminating Flash wait states. |
| Memory | 512 KB Flash (ECC-protected, PCROP-enabled), 96 KB SRAM + 16 KB CCM-SRAM (parity-checked), supporting deterministic code/data placement. |
| Analog Peripherals | 3 × 16-bit ADCs (0.25 µs conversion, hardware oversampling), 4 × 12-bit DACs (2 buffered external @ 1 MSPS, 2 unbuffered internal @ 15 MSPS). |
| Timers | 15 timers including 3 advanced motor-control timers (TIM1/TIM8/TIM20) with dead-time generation, emergency stop, and quadrature encoder input. |
| Communication | 2 × FDCAN, 5 × USART/UART (with LIN/IrDA), 3 × I²C (Fast Mode Plus), 3 × SPI, 1 × SAI, USB FS, and UCPD for USB-C PD negotiation. |
| Math Acceleration | CORDIC engine for sin/cos/tan/log/exp and FMAC for FIR/IIR filter coefficient computation - offloading CPU in motor and power apps. |
| Package & Pins | UFQFPN48 (7 × 7 mm, 0.5 mm pitch), 44 GPIOs (39 5 V-tolerant), supporting mappable EXTI and high-speed analog routing. |
Pinout & Package
STM32G491CEU6 uses the UFQFPN48 (7 × 7 mm, 0.5 mm pitch) package, RoHS-compliant and ECOPACK2 certified, optimized for space-constrained industrial and motor control PCBs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA | Core & analog supply | 1.71–3.6 V operation; separate VDDA enables clean analog reference for ADC/DAC/OPAMP. |
| VSS, VSSA | Digital & analog ground | Independent grounding reduces noise coupling between digital switching and precision analog circuits. |
| PA0–PA15, PB0–PB15, PC0–PC15, PD0–PD2, PF0–PF1 | General-purpose I/O | 44 GPIOs; 39 support 5 V tolerance, allowing direct interface with 5 V logic without level shifters. |
| NRST | Active-low reset | Asynchronous reset input with internal pull-up; compatible with external push-button or supervisor IC assertion. |
| BOOT0 | Boot mode select | Configures boot source (system memory, embedded Flash, or SRAM) on power-up or reset. |
| OSC_IN / OSC_OUT | HSE crystal interface | Supports 4–48 MHz external crystal for precise timing; essential for USB, CAN, and RTC accuracy. |
| VBAT | RTC backup supply | Enables calendar RTC and 32 backup registers during main power loss using coin-cell or supercap. |
| UCPD1_DB, UCPD1_CC1/CC2 | USB-C PD controller I/O | Dedicated pins for USB Type-C CC line monitoring and BMC communication with PD controllers. |
Key Features
| Feature | Design Value |
|---|---|
| CORDIC accelerator | Hardware trigonometric/logarithmic computation in <100 ns, eliminating software library overhead in motor FOC and sensor fusion. |
| FMAC unit | Single-cycle filter coefficient update for 2nd-order IIR/FIR, enabling real-time adaptive filtering in digital power supplies. |
| Triple ADC interleaving | Simultaneous sampling across 3 ADCs with hardware synchronization, critical for three-phase current/voltage acquisition in inverters. |
| Advanced timers with dead time | TIM1/TIM8/TIM20 provide programmable dead-time insertion (1–1023 ns resolution) and fault input handling for safe gate driver control. |
| VREFBUF output options | Programmable 2.048 V / 2.5 V / 2.9 V reference for ADC/DAC calibration and OPAMP gain setting, reducing external component count. |
| FDCAN FD support | Flexible Data-Rate up to 5 Mbps with payload up to 64 bytes, enabling high-bandwidth diagnostics and firmware updates over CAN bus. |
Applications
| Industrial Motor Control | Digital Power Supply |
|---|---|
Use Scenario: Field-oriented control (FOC) of 3-phase BLDC/PMSM motors in HVAC compressors and industrial drives. IC Role / Device Role / Timing Role: Real-time execution of FOC algorithm (Park/Clarke transforms, PI regulators), PWM generation with sub-100 ns dead-time control, and simultaneous current sensing via triple ADC. Use Value: CORDIC and FMAC reduce CPU load by >40%, enabling 20 kHz PWM carrier frequency while maintaining 10 kHz control loop bandwidth. | Use Scenario: Isolated AC/DC and DC/DC converters with digital voltage/current regulation and protection. IC Role / Device Role / Timing Role: Closed-loop regulation using hardware-accelerated PID, synchronous rectification timing, and fast overcurrent response via analog comparator-triggered emergency shutdown. Use Value: Four independent OPAMPs configured as PGAs enable direct current-sense amplification; dual FDCAN supports remote monitoring and firmware updates without disrupting power stage. |
| Smart Grid Sensor Node | USB-C Power Delivery Hub |
Use Scenario: Compact, battery-backed metering node measuring voltage, current, harmonics, and temperature in distribution panels. IC Role / Device Role / Timing Role: High-precision analog front-end (16-bit ADC, VREFBUF, temp sensor), RTC with alarm wakeup, and low-power Stop mode operation (<1.5 µA). Use Value: 112 KB SRAM retains full measurement buffers during deep sleep; LPTIM1 triggers periodic ADC sampling without CPU wake-up. | Use Scenario: Multi-port USB-C hub negotiating power contracts (up to 100 W), managing CC line state, and implementing policy engine. IC Role / Device Role / Timing Role: Dedicated UCPD peripheral handles BMC physical layer, Type-C state machine, and PD protocol stack offload from main application core. Use Value: Integrated UCPD eliminates need for external PD controller IC, reducing BOM cost and PCB area while supporting USB PD 3.0 with PPS. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-performance mixed-signal microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32G474RET6 | Same G4 series, but 512 KB Flash, 128 KB SRAM, no CORDIC/FMAC, only 2 ADCs, no UCPD. | Lacks hardware math acceleration and USB-C PD capability; suitable for cost-sensitive motor control without FOC or PD requirements. | Select when UCPD, CORDIC, or triple ADC concurrency is not required - lower BOM cost and simpler layout. |
| STM32H743VIT6 | Cortex-M7 core @ 480 MHz, 2 MB Flash, 1 MB RAM, dual-core option, no CORDIC/FMAC, higher power consumption. | Targeted at high-throughput applications (e.g., industrial HMI, vision preprocessing); lacks analog integration density and low-power features of G4. | Choose for raw processing throughput and large memory footprint where analog integration and sub-µA Stop modes are secondary. |
Compared with STM32G474RET6, the STM32G491CEU6 adds deterministic math acceleration and USB-C PD control at identical package size; versus STM32H743VIT6, it delivers superior analog integration and energy efficiency per MHz in resource-constrained edge nodes.
Availability
STM32G491CEU6 is available at Aetrix Electronics and suitable for industrial motor drives, digital power supplies, smart grid sensors, and USB-C PD hubs requiring stable component supply, long-term manufacturability, and qualified automotive-grade variants (where applicable).
Supply support for STM32G491CEU6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power devices, sensors, and analog ICs for industrial, automotive, and consumer markets.
The STM32G4 series targets high-efficiency digital power conversion and real-time motor control, integrating specialized analog peripherals and hardware math accelerators to replace discrete signal-chain components and reduce system-level complexity.
FAQ
What is the maximum operating temperature range for STM32G491CEU6?
The STM32G491CEU6 is specified for industrial temperature range: –40 °C to +85 °C ambient, validated per JEDEC JESD47 stress testing. Thermal derating begins above 70 °C ambient when operating at 170 MHz with full peripheral activation; junction temperature must remain below 125 °C under all conditions.
Does STM32G491CEU6 support secure boot and firmware encryption?
Yes - it includes proprietary code readout protection (PCROP), securable memory areas, and hardware AES-256 encryption engine. Secure boot is implemented via ROM-based bootloader verifying signed firmware images stored in Flash, with public key stored in one-time-programmable (OTP) memory.
Can the four operational amplifiers be used in instrumentation amplifier configuration?
Yes - all four OPAMPs expose both inputs and outputs externally, enabling user-defined configurations including 3-opamp instrumentation amplifiers. Gain can be set via external resistors; internal PGA mode supports gains of 1, 2, 4, 8, 16, and 32 with rail-to-rail output swing.
Is the UFQFPN48 package of STM32G491CEU6 compatible with reflow soldering per IPC-J-STD-020?
Yes - the UFQFPN48 (A0B9 package variant) is qualified for standard lead-free reflow per IPC-J-STD-020D, with peak temperature of 260 °C for ≤30 seconds. Moisture sensitivity level (MSL) is 3, requiring bake-out if exposed to ambient >12 months after seal opening.
STM32G491CEU6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 48-UFQFN Exposed Pad
- Series:
- STM32G4
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M4F
- Core Size:
- 32-Bit Single-Core
- Speed:
- 170MHz
- Connectivity:
- CANbus, I2C, IrDA, IRTIM, LINbus, SAI, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, PWM, WDT
- Number of I/O:
- 42
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 112K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 19x12b; D/A 4x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32G491CEU6 FAQ
1.How can I place an order for STM32G491CEU6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32G491CEU6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32G491CEU6 reliable?
The price and inventory of STM32G491CEU6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32G491CEU6 is usually 5 days.
3.What payment methods are accepted for STM32G491CEU6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32G491CEU6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32G491CEU6?
STM32G491CEU6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32G491CEU6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32G491CEU6?
For technical support, including STM32G491CEU6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32G491CEU6 requirements.
6.How does Aetrix verify that STM32G491CEU6 is sourced from the original manufacturer or authorized distributors?
All STM32G491CEU6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32G491CEU6 meets industry standards.
7.What is the process for return or replacement of STM32G491CEU6?
All STM32G491CEU6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32G491CEU6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32G491CEU6 part is unused and in its original packaging.
Return procedure for STM32G491CEU6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32G491CEU6 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
