STMicroelectronics STM32H523ZET6
- Part No.:
- STM32H523ZET6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
STM32H523ZET6.pdf
- Description:
- IC MCU 32BIT 512KB FLASH 144LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:190
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32H523ZET6 from STMicroelectronics is a production-grade Arm® Cortex®-M33 32-bit microcontroller with TrustZone® security, 250 MHz max clock, 512-Kbyte ECC flash, and 272-Kbyte SRAM (80-Kbyte with ECC). It integrates dual DMA controllers, two 12-bit ADCs (5 Msps), one dual-channel 12-bit DAC, FDCAN, USB 2.0 FS host/device, Octo-SPI, and hardware crypto accelerators (PKA, HASH, RNG). It targets secure industrial control, IoT edge nodes, and smart metering where real-time performance, memory safety, and cryptographic integrity are critical.
For engineers reviewing the STM32H523ZET6 datasheet, STM32H523ZET6 pinout, STM32H523ZET6 application, or STM32H523ZET6 equivalent, key selection criteria include TrustZone-enforced peripheral isolation, dual-bank read-while-write flash for OTA updates, 5 V-tolerant GPIOs (up to 112), 1.71–3.6 V supply range, and PSA Level 3/SESIP3 certification for firmware authenticity and tamper resistance.
Technical Context
The STM32H523ZET6 implements Armv8-M mainline security with configurable SAU regions and TrustZone-aware peripherals including GTZC-managed memory, RCC, GPIO, and FMC. Its ART Accelerator includes 8-Kbyte instruction cache and 4-Kbyte data cache-enabling zero-wait-state execution from flash and external memories while supporting deterministic real-time response.
It features dual GPDMA controllers with FIFOs, two independent 12-bit ADCs (each up to 5 Msps with hardware oversampling), and a dedicated digital temperature sensor (DTS) compliant with NIST SP800-90B. Clock management includes HSI64, HSI48, CSI4, LSI, HSE (4–50 MHz), and LSE (32.768 kHz), with PLL support for precise frequency synthesis across domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, 250 MHz max - enables secure, deterministic real-time execution with hardware-enforced privilege separation. |
| Flash Memory | 512 Kbytes with ECC and dual-bank RWW - supports atomic firmware updates and data retention during code execution. |
| SRAM | 272 Kbytes total: 80-Kbyte SRAM2 with ECC + 2-Kbyte backup SRAM - ensures data integrity in active and low-power modes. |
| Analog Peripherals | Two 12-bit ADCs (5 Msps each), one dual-channel 12-bit DAC, DTS, VREFBUF - enables high-fidelity sensor acquisition and analog output without external components. |
| Security | PSA Level 3 & SESIP3 certified; PKA, HASH (SHA-1/2/3), TRNG, 96-bit UID, secure boot with HDP - meets stringent requirements for firmware authentication and entropy generation. |
| I/O Capability | Up to 112 fast I/Os, most 5 V-tolerant; ten I/Os with independent 1.08–3.6 V supply - simplifies interface with legacy logic and mixed-voltage subsystems. |
| Communication | Three I²C (Fm+), two I³C, six USART/LPUART, four SPI/I²S, two FDCAN, Octo-SPI, SDMMC, USB FS, UCPD - provides flexible connectivity for industrial fieldbus, sensor networks, and power delivery systems. |
Pinout & Package
LQFP144 (20 × 20 mm, 0.5 mm pitch) package with 144 leads. Pinout validated per DS14540 Rev 3 Section 4.1–4.2 and Table 13 (STM32H523xx pin/ball definition).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Power supply inputs | Separate 1.71–3.6 V domains for core, analog, and I/O - enables noise isolation and flexible voltage sequencing. |
| VSS, VSSA, VSSIO2 | Ground returns | Dedicated analog and I/O ground planes minimize coupling into sensitive ADC/DAC paths. |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; supports external reset supervision and brown-out recovery. |
| BOOT0 | Boot mode selection | Configures boot source (system memory, flash, or embedded SRAM) at power-on; level-sensitive, sampled on NRST release. |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | 112 total GPIOs with interrupt capability; up to 5 V tolerance on most pins - eliminates level-shifter requirements in mixed-voltage designs. |
| PC13–PC15 | RTC/LSE interface | Dedicated pins for 32.768 kHz crystal or oscillator - ensures accurate timekeeping and low-power RTC operation. |
| PA11/PA12 | USB 2.0 FS D+/D− | Full-speed USB transceiver with crystal-less operation - reduces BOM cost and PCB area for USB device/host applications. |
| PD0/PD1 | OSC_IN/OSC_OUT | 4–50 MHz external crystal interface - supports precise clock sourcing for communication peripherals and real-time control loops. |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-enabled memory protection | Eight configurable SAU regions enforce secure/non-secure access to flash, SRAM, and peripherals - prevents unauthorized code/data access in multi-tenant firmware. |
| ART Accelerator with caches | 8-Kbyte ICACHE + 4-Kbyte DCACHE eliminate wait states for flash/external memory access - sustains 375 DMIPS at 250 MHz without performance penalty. |
| Secure life cycle management | Flexible debug authentication and secure hide protection area (HDP) - allows controlled development, production, and field update phases without exposing secrets. |
| Dual-bank flash with RWW | 512-Kbyte flash split into two banks; one bank executable while other is erased/programmed - enables seamless over-the-air firmware updates. |
| Hardware crypto acceleration | PKA (ECDSA), HASH (SHA-1/2/3), TRNG (NIST SP800-90B) - offloads asymmetric signing, hashing, and entropy generation from CPU, reducing latency and power. |
Applications
| Industrial PLC Controller | Smart Energy Meter |
|---|---|
Use Scenario: Real-time motion control and I/O scanning in compact programmable logic controllers with fieldbus connectivity. IC Role / Device Role / Timing Role: Main application processor executing control algorithms, managing FDCAN/RS-485 interfaces, and servicing ADC inputs at sub-millisecond intervals. Use Value: 250 MHz Cortex-M33 + dual 5 Msps ADCs enable simultaneous sampling of multiple current/voltage sensors with deterministic loop timing. |
Use Scenario: Revenue-grade electricity metering with tamper detection, secure firmware updates, and metrology-grade analog front-end. IC Role / Device Role / Timing Role: Secure system-on-chip handling metrology calculations, TLS-secured cloud reporting, and anti-tamper monitoring via active sensors and backup SRAM. Use Value: PSA Level 3 certification, HDP-protected boot, and DTS-based thermal anomaly detection ensure regulatory compliance and long-term firmware integrity. |
| IoT Edge Gateway | Medical Sensor Hub |
Use Scenario: Protocol-agnostic edge node aggregating BLE/Zigbee/Wi-Fi sensor data and forwarding via cellular or Ethernet with local AI inference. IC Role / Device Role / Timing Role: Central hub MCU running TF-M secure services, managing Octo-SPI-connected PSRAM for ML model caching, and orchestrating multi-interface concurrency. Use Value: Dual GPDMA controllers and 272-Kbyte SRAM allow parallel data movement between UART, SPI, USB, and crypto engines without CPU bottlenecks. |
Use Scenario: Portable patient monitor collecting ECG, SpO₂, and temperature data with clinical-grade accuracy and HIPAA-compliant data encryption. IC Role / Device Role / Timing Role: Safety-critical signal processor acquiring synchronized analog channels via dual ADCs, performing real-time filtering, and encrypting data before storage/transmission. Use Value: 12-bit DAC outputs drive precision analog front-end calibration; TRNG + PKA enable FIPS 140-2 compliant key generation for encrypted data logs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32H563VIT6 | Higher flash (2 Mbyte), larger SRAM (1 Mbyte), additional crypto engines (AES-GCM, HMAC), no Octo-SPI | Targeted at complex secure gateways requiring larger code footprint and advanced cipher suites | Select when >1 Mbyte flash or AES-GCM acceleration is required; not drop-in due to pinout and peripheral differences |
| STM32U575ZIT6 | Lower max frequency (160 MHz), smaller flash (2 Mbyte), same TrustZone/PSA Level 3, no FDCAN or Octo-SPI | Better suited for ultra-low-power battery-operated devices with moderate compute needs | Choose for sub-10 µA Stop mode current and extended temperature range (–40 to 125 °C); lacks FDCAN and high-speed analog |
Compared with STM32H523ZET6, the H563 offers greater memory and crypto depth at higher cost and power, while the U575 trades performance and interface richness for extreme energy efficiency - making the H523 optimal for balanced secure industrial edge applications.
Availability
STM32H523ZET6 is available at Aetrix Electronics and suitable for industrial PLCs, smart energy meters, IoT edge gateways, and medical sensor hubs requiring stable component supply, long lifecycle assurance, and certified security features.
Supply support for STM32H523ZET6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and automotive semiconductors since 1987.
The STM32H5 series is ST's flagship secure MCU line built on Cortex-M33 with TrustZone, targeting applications demanding PSA Level 3 certification, hardware-rooted security, and real-time deterministic performance in industrial and infrastructure markets.
FAQ
What is the maximum operating frequency and associated performance metric?
The STM32H523ZET6 operates at up to 250 MHz, delivering 375 DMIPS (Dhrystone 2.1) and 1023 CoreMark®. This performance is sustained via the ART Accelerator's 8-Kbyte instruction cache, enabling zero-wait-state execution from embedded flash - critical for deterministic real-time control loops and high-throughput data processing.
How does the dual-bank flash architecture support firmware updates?
The 512-Kbyte flash is split into two independently erasable/programmable banks. While one bank executes application code, the other can be reprogrammed - enabling atomic, fail-safe over-the-air (OTA) updates without halting system operation. This architecture is essential for remote industrial devices requiring continuous uptime and verified firmware integrity.
Which security certifications apply to the STM32H523ZET6?
The device is certified to PSA Certified Level 3 and SESIP3 (Security Evaluation Standard for IoT Platforms), validating its secure boot, runtime isolation, cryptographic acceleration (PKA, HASH, TRNG), and tamper resistance. These certifications confirm suitability for applications requiring formal assurance of firmware authenticity, data confidentiality, and side-channel resilience.
What are the key analog capabilities for sensor interfacing?
It integrates two independent 12-bit ADCs, each capable of 5 Msps sampling with hardware oversampling and offset/gain calibration. Combined with a dual-channel 12-bit DAC, digital temperature sensor (DTS), and voltage reference buffer (VREFBUF), it supports high-accuracy acquisition and stimulus generation for industrial and medical sensors without external signal conditioning.
STM32H523ZET6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 144-LQFP
- Series:
- STM32H5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 250MHz
- Connectivity:
- CANbus, FIFO, I2C, IrDA, LINbus, MMC/SD/SDIO, SMBus, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, PWM, WDT
- Number of I/O:
- 112
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 272K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 20x10b SAR
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32H523ZET6 FAQ
1.How can I place an order for STM32H523ZET6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32H523ZET6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32H523ZET6 reliable?
The price and inventory of STM32H523ZET6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32H523ZET6 is usually 5 days.
3.What payment methods are accepted for STM32H523ZET6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32H523ZET6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32H523ZET6?
STM32H523ZET6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32H523ZET6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32H523ZET6?
For technical support, including STM32H523ZET6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32H523ZET6 requirements.
6.How does Aetrix verify that STM32H523ZET6 is sourced from the original manufacturer or authorized distributors?
All STM32H523ZET6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32H523ZET6 meets industry standards.
7.What is the process for return or replacement of STM32H523ZET6?
All STM32H523ZET6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32H523ZET6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32H523ZET6 part is unused and in its original packaging.
Return procedure for STM32H523ZET6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32H523ZET6 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

