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STMicroelectronics STM32H533RET6
- Part No.:
- STM32H533RET6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
STM32H533RET6.pdf
- Description:
- IC MCU 32BIT 512KB FLASH 64LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:552
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Product details
Overview
STM32H533RET6 from STMicroelectronics is a high-security, high-performance Arm® Cortex®-M33 32-bit microcontroller with TrustZone®, FPU, and cryptographic accelerators. It operates at up to 250 MHz (375 DMIPS), integrates 512 KB flash with ECC and 272 KB SRAM (80 KB with ECC), and supports secure firmware installation (SFI), PSA Level 3 and SESIP3 certification - deployed in industrial gateways requiring real-time control, encrypted OTA updates, and hardware-rooted trust.
For engineers reviewing the STM32H533RET6 datasheet, STM32H533RET6 pinout, STM32H533RET6 application, or STM32H533RET6 equivalent, key selection criteria include TrustZone-enforced peripheral isolation, dual AES coprocessors (one DPA-resistant), on-the-fly Octo-SPI decryption, 12-bit ADC @ 5 Msps, and LQFP64 package compatibility with legacy STM32H7 layout footprints.
Technical Context
The device implements Armv8-M mainline security extensions with configurable SAU regions and ST's immutable root of trust (ST-iROT), enabling secure boot via unique entry point and HDP-protected firmware. Its dual-cache ART Accelerator includes 8 KB instruction cache and 4 KB data cache for zero-wait-state execution from flash and external memories.
Security peripherals are TrustZone-aware: SAES (AES-128/192/256), PKA (RSA/ECC/DH), HASH (SHA-1/2/3), and OTFDEC for serial PSRAM/NOR/NAND - all accessible only from secure world. The dual GPDMA controllers offload CPU during crypto operations and high-throughput ADC/DAC transfers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, 250 MHz max - enables deterministic real-time tasks and secure/non-secure partitioning |
| Flash Memory | 512 KB with ECC, two banks, read-while-write - supports live firmware updates without interruption |
| SRAM | 272 KB total: 80 KB SRAM2 with ECC + 2 KB backup SRAM - retains critical state in Standby mode with VBAT |
| Analog Peripherals | Two 12-bit ADCs (5 Msps), one dual-channel 12-bit DAC, digital temperature sensor - suitable for closed-loop motor control and sensor fusion |
| Crypto Acceleration | Dual AES engines (one DPA-resistant), PKA, HASH (SHA-1/2/3), RNG (NIST SP800-90B compliant) - accelerates TLS handshake and secure boot verification |
| Communication Interfaces | Three I2C (Fm+), two I3C, six USART/LPUART, four SPI/I2S, two FDCAN, USB FS host/device, UCPD - meets industrial fieldbus and USB-C PD requirements |
| Package & Pin Count | LQFP64 (10 × 10 mm), 64-pin, 5 V-tolerant I/Os (up to 112 total) - compatible with standard PCB assembly and thermal management |
Pinout & Package
LQFP64 (10 × 10 mm, 0.5 mm pitch) package with exposed thermal pad; RoHS-compliant ECOPACK2 finish. Pinout validated per STMicroelectronics DS14539 Rev 3, Section 4.2 (Pin description) and Table 14 (STM32H533xx pin/ball definition).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Power supply inputs | 1.71–3.6 V digital/analog core and I/O domain supplies; decoupling required per datasheet section 5.3.2 |
| VSS, VSSA | Ground references | Analog/digital ground separation ensures <1 LSB ADC noise at 5 Msps sampling rate |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; supports external reset supervisor integration |
| BOOT0 | Boot mode selection | High at power-up selects system memory bootloader; used for factory recovery or DFU |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | Up to 112 fast GPIOs with interrupt capability; most 5 V-tolerant - simplifies level-shifting in mixed-voltage systems |
| PC13–PC15 | RTC-related functions | Supports 32.768 kHz LSE crystal, RTC clock, tamper detection, and 32 backup registers |
| PF0–PF15 | Octo-SPI interface signals | OctoSPI1_NCS, OctoSPI1_IO0–IO7 - enables direct XIP execution from encrypted serial PSRAM/NOR |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-enforced peripheral isolation | Eight configurable SAU regions enforce secure/non-secure access to memory and peripherals - prevents privilege escalation in multi-tenant firmware |
| On-the-fly Octo-SPI decryption (OTFDEC) | Decrypts external serial flash/PSRAM in real time using AES-128/192/256 - eliminates need for RAM-based decryption buffers |
| Secure firmware installation (SFI) | Hardware-verified signature check before flash write - blocks unauthorized firmware images at programming stage |
| Dual independent AES coprocessors | One optimized for throughput (e.g., TLS), one hardened against DPA side-channel attacks - enables concurrent secure comms and trusted boot |
| PSA Certified Level 3 & SESIP3 | Pre-certified security assurance target - reduces validation effort for medical, industrial, and payment applications |
Applications
| Industrial Gateway | Secure Edge Node |
|---|---|
Use Scenario: Protocol translation between Modbus RTU, CAN FD, and MQTT over TLS-secured Wi-Fi/ethernet. IC Role / Device Role / Timing Role: Main application processor executing RTOS, managing crypto offload, and synchronizing time-critical fieldbus cycles via FDCAN and LPTIM. Use Value: Dual AES + PKA accelerates TLS 1.3 handshake and certificate verification in <150 ms, enabling sub-second OTA update readiness. | Use Scenario: Tamper-evident sensor node collecting vibration, temperature, and humidity in hazardous environments. IC Role / Device Role / Timing Role: Secure sensor hub with active tamper detection, encrypted local storage, and authenticated BLE beacon transmission. Use Value: Hardware unique key (HUK) and true RNG enable per-device key derivation - prevents cloning and replay attacks on wireless telemetry. |
| USB-C Power Delivery Controller | Motor Control Hub |
Use Scenario: Embedded UCPD controller negotiating voltage/current contracts and enforcing policy-based power routing in multi-port chargers. IC Role / Device Role / Timing Role: Dedicated UCPD PHY + policy engine with real-time USB PD 3.1 r3.1 stack execution and fault response under 100 µs. Use Value: Integrated UCPD peripheral with hardware CRC and packet filtering reduces BOM count and eliminates external PD controller IC. | Use Scenario: Field-oriented control (FOC) for BLDC motors in HVAC compressors with safety shutdown and thermal monitoring. IC Role / Device Role / Timing Role: Real-time motor controller running FOC loop at 20 kHz, sampling dual ADCs simultaneously, and driving PWM via advanced timers (TIM1/TIM8). Use Value: 12-bit ADC @ 5 Msps with hardware oversampling delivers <1% torque ripple; TrustZone isolates safety-critical shutdown logic from application firmware. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-security MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32H753VIT6 | Same LQFP100 package footprint but no TrustZone; uses Cortex-M7, lacks PSA Level 3 certification and OTFDEC | Suitable for non-security-critical real-time control where crypto is software-implemented | Select when hardware-enforced security boundaries and certified crypto acceleration are not required |
| NXP i.MX RT1176DVMAA | Cortex-M7 + M4 dual-core; includes AHB firewall and CAAM crypto block but no PSA Level 3 certification or SFI | Better suited for asymmetric processing (M7 for UI, M4 for control) but requires external secure element for full root-of-trust | Choose when dual-core deterministic latency and display interface support outweigh certified secure boot needs |
Compared with STM32H753VIT6 and i.MX RT1176DVMAA, the STM32H533RET6 uniquely delivers PSA Level 3–certified TrustZone, on-the-fly external memory decryption, and preconfigured immutable root of trust - eliminating external secure elements and reducing firmware validation scope for regulated deployments.
Availability
STM32H533RET6 is available at Aetrix Electronics and suitable for industrial gateways, secure edge nodes, USB-C PD controllers, and motor control hubs requiring stable component supply across extended product lifecycles.
Supply support for STM32H533RET6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in microcontrollers, power management, sensors, and automotive ICs with strong emphasis on industrial and security-focused solutions.
The STM32H5 series is designed for high-assurance embedded applications demanding certified security, real-time determinism, and cryptographic agility - targeting industrial automation, smart energy, and secure IoT endpoints.
FAQ
What debug interfaces does the STM32H533RET6 support?
The STM32H533RET6 supports Serial Wire Debug (SWD), JTAG, and Embedded Trace Macrocell (ETM) with authenticated debug access enforced by TrustZone. Debug authentication requires secure life cycle configuration and valid credentials - unauthenticated debug access is permanently disabled after secure provisioning.
Does the STM32H533RET6 support external memory interfaces beyond Octo-SPI?
Yes - it includes a Flexible Memory Controller (FMC) supporting SRAM, PSRAM, FRAM, and NOR/NAND memories with up to 16-bit data bus width. This complements Octo-SPI by enabling parallel-interface high-bandwidth storage (e.g., NAND for firmware logging) alongside serial XIP execution.
How is the 272 KB SRAM organized and protected?
The 272 KB SRAM comprises 192 KB general-purpose SRAM, 80 KB SRAM2 with ECC, and 2 KB backup SRAM. SRAM2 is TrustZone-secured and ECC-protected for critical secure-world data; backup SRAM remains powered in Standby mode via VBAT and retains 32 registers for RTC context preservation.
Can the STM32H533RET6 operate in ultra-low-power modes while maintaining cryptographic readiness?
Yes - in Stop mode, LPTIM1/LPTIM2 remain active, and the PKA and SAES accelerators retain power state. Combined with 2 KB backup SRAM and VBAT-supplied RTC, the device can perform authenticated wake-up and resume secure operations within 5 µs - ideal for battery-powered secure sensors.
STM32H533RET6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 64-LQFP
- Series:
- STM32H5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 250MHz
- Connectivity:
- CANbus, FIFO, I2C, IrDA, LINbus, MMC/SD/SDIO, SMBus, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, POR, PWM, WDT
- Number of I/O:
- 49
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 272K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 16x10b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32H533RET6 FAQ
1.How can I place an order for STM32H533RET6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32H533RET6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32H533RET6 reliable?
The price and inventory of STM32H533RET6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32H533RET6 is usually 5 days.
3.What payment methods are accepted for STM32H533RET6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32H533RET6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32H533RET6?
STM32H533RET6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32H533RET6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32H533RET6?
For technical support, including STM32H533RET6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32H533RET6 requirements.
6.How does Aetrix verify that STM32H533RET6 is sourced from the original manufacturer or authorized distributors?
All STM32H533RET6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32H533RET6 meets industry standards.
7.What is the process for return or replacement of STM32H533RET6?
All STM32H533RET6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32H533RET6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32H533RET6 part is unused and in its original packaging.
Return procedure for STM32H533RET6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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