STMicroelectronics STM32H562AGI6
- Part No.:
- STM32H562AGI6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 169-UFBGA
- Datasheet:
-
STM32H562AGI6.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 169UFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:4,866
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32H562AGI6 from STMicroelectronics is a high-performance, secure Arm® Cortex®-M33 32-bit microcontroller with TrustZone®, FPU, and 250 MHz operation delivering 375 DMIPS. It integrates 2 Mbyte flash with ECC, 640 Kbyte SRAM (including ECC-protected SRAM2/SRAM3), dual DMA controllers, CORDIC/FMAC math accelerators, and dual FDCAN interfaces. It targets secure industrial control, IoT edge nodes, and smart metering systems requiring real-time processing and firmware integrity.
For engineers reviewing the STM32H562AGI6 datasheet, STM32H562AGI6 pinout, STM32H562AGI6 application, or STM32H562AGI6 equivalent, key selection criteria include TrustZone-enabled secure boot, 250 MHz deterministic execution, dual-bank flash with read-while-write, 140 I/Os (most 5 V-tolerant), and support for USB Type-C®/PD, Ethernet MAC, and Octo-SPI external memory expansion.
Technical Context
The STM32H562AGI6 implements an Armv8-M mainline architecture with hardware-enforced TrustZone isolation, enabling secure and non-secure execution environments. Its dual-cache ART Accelerator includes 8-Kbyte instruction cache and 4-Kbyte data cache, eliminating wait states for flash execution and accelerating external memory access.
It features two independent GPDMA controllers supporting memory-to-memory, peripheral-to-memory, and memory-to-peripheral transfers with FIFO buffering. The security subsystem includes HASH, PKA, ECDSA verification, NIST SP800-90B-compliant TRNG, and active tamper detection-enabling certified secure firmware installation (SFI) and over-the-air updates via TF-M.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU; enables secure RTOS partitioning and floating-point-intensive control loops. |
| Max Clock Frequency | 250 MHz; delivers 375 DMIPS (Dhrystone 2.1) and 1023 CoreMark® for deterministic real-time response. |
| Flash Memory | 2 Mbyte embedded flash with ECC and dual-bank read-while-write; supports seamless firmware updates without halting execution. |
| SRAM | 640 Kbyte total: 64 Kbyte SRAM2 (ECC), 320 Kbyte SRAM3 (flexible ECC), 4 Kbyte backup SRAM; ensures data retention in lowest power modes. |
| I/O Count & Tolerance | Up to 140 fast GPIOs; most are 5 V-tolerant, simplifying interface with legacy peripherals and level-shifting circuits. |
| Security Features | TrustZone, SAU-configurable memory regions, SFI, HASH/PKA accelerators, TRNG, 96-bit unique ID, active tampers; meets PSA Level 3 and SESIP requirements. |
| Math Acceleration | CORDIC for real-time trigonometric computation and FMAC for FIR/IIR filter acceleration-reducing CPU load in motor control/audio applications. |
| Communication Interfaces | 2× FDCAN, 12× U(S)ART, 4× I²C, 1× I³C, 6× SPI, 2× SAI, 1× Ethernet MAC, 1× USB FS host/device, 1× UCPD; enables multi-protocol industrial connectivity. |
Pinout & Package
The STM32H562AGI6 is housed in a 169-ball UFBGA package (7 × 7 mm, 0.5 mm pitch) with 140 user I/Os, VDD/VSS power pins, dedicated debug (SWD/JTAG), reset (NRST), and multiple voltage domains (VDDA, VREF+, VCAP).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDIO | Core & I/O supply | 1.71–3.6 V input; powers digital logic and 5 V-tolerant I/Os; requires local decoupling per datasheet layout rules. |
| VDDA, VREF+ | Analog supply & reference | 1.71–3.6 V analog domain; VREF+ sets ADC/DAC full-scale range; must be filtered independently from digital rails. |
| VCAP | Core regulator bypass | External 2.2 µF ceramic capacitor stabilizes internal LDO/SMPS output; critical for low-noise core voltage regulation. |
| NRST | Active-low reset | Asynchronous reset input; asserted on power-up, brownout, or watchdog timeout; supports external pull-up and debouncing. |
| PA13/PA14 | SWD debug interface | Serial Wire Debug clock (SWCLK) and data (SWDIO); enables secure authenticated debug access under TrustZone control. |
| PC14/PC15 | Low-speed oscillator | Connects to 32.768 kHz crystal for RTC and low-power timer operation; supports calibration and tamper detection. |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-aware peripherals | All major peripherals (GPIO, UART, SPI, timers, etc.) support secure/non-secure attribute configuration-enabling granular peripheral access control. |
| Flexible memory controller (FMC) | Supports SRAM, PSRAM, NOR/NAND, SDRAM/LPSDR, FRAM up to 16-bit bus width-enables scalable external memory for HMI or data logging. |
| Octo-SPI interface | Single interface drives serial PSRAM/NOR/NAND, HyperRAM, and HyperFlash with frame formats-replaces multiple parallel buses with one high-speed serial link. |
| Dual low-power timer banks | Six LPTIMs available in Stop mode; each supports encoder, pulse-width measurement, or ultra-low-power periodic wake-up (<1 µA typical). |
| Secure firmware upgrade | Hardware-accelerated SFI with TF-M integration allows cryptographically signed, authenticated firmware updates-preventing unauthorized code injection. |
| USB Type-C®/PD controller (UCPD) | Integrated UCPD PHY and protocol engine supports USB Power Delivery negotiation, VCONN switching, and cable ID-eliminates external PD controllers. |
Applications
| Industrial PLC Edge Node | Smart Energy Meter |
|---|---|
Use Scenario: Real-time motor control and fieldbus gateway in compact PLC modules with limited board space and thermal budget. IC Role / Device Role / Timing Role: Main application processor executing control algorithms, managing EtherCAT/PROFINET stacks, and handling secure firmware updates. Use Value: 250 MHz Cortex-M33 + CORDIC/FMAC offloads PID and vector control math; dual FDCAN supports CANopen device networks; TrustZone isolates safety-critical tasks. |
Use Scenario: Revenue-grade electricity meter with metrology, tamper detection, secure communication, and remote firmware update capability. IC Role / Device Role / Timing Role: Secure system-on-chip integrating metrology ADC interface, RTC with battery backup, and TLS-secured NB-IoT/LTE-M modem control. Use Value: Dual 12-bit ADCs (5 Msps) enable Class 0.2 accuracy; active tampers and TRNG meet IEC 62056/62443; 640 KB SRAM buffers encrypted telemetry payloads. |
| Secure IoT Gateway | Medical Diagnostic Handheld |
Use Scenario: Battery-powered edge gateway aggregating BLE/Zigbee sensor data, performing local AI inference, and forwarding to cloud via LTE/Wi-Fi. IC Role / Device Role / Timing Role: Trusted execution environment host running TF-M, managing secure sensor data ingestion, and enforcing policy-based OTA update validation. Use Value: SFI + PKA accelerators reduce OTA signature verification time by >90%; 140 I/Os support diverse sensor interfaces; low-power timers extend battery life to >1 year. |
Use Scenario: Portable ultrasound or ECG device requiring high-resolution analog acquisition, real-time signal processing, and HIPAA-compliant data encryption. IC Role / Device Role / Timing Role: Central controller interfacing with 12-bit ADCs/DACs, driving display via SAI/LCD interface, and encrypting patient data before storage/transmission. Use Value: 2 MB flash stores certified medical firmware and calibration tables; ECC-protected SRAM ensures data integrity during acquisition; USB FS enables secure PC sync. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-security, high-performance MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32H563AGI6 | Same core, memory, and peripherals-but adds Ethernet PHY (RMII) and HDMI-CEC; no integrated SMPS regulator in some variants. | Better suited for wired industrial gateways requiring native Ethernet PHY and consumer IR control. | Select when Ethernet MAC + PHY co-location is required and board-level SMPS design is acceptable. |
| NXP i.MX RT1189 | Arm Cortex-M7 + M33 dual-core; higher clock (1.5 GHz M7), larger RAM (2 MB), but lacks TrustZone-peripheral granularity and SFI hardware acceleration. | Targeted at complex UI-rich HMI or audio DSP where raw throughput outweighs fine-grained security enforcement. | Choose when dual-core asymmetric processing (M7 for UI/audio, M33 for secure services) is mandatory and PSA certification is secondary. |
Compared with STM32H562AGI6, the STM32H563AGI6 adds integrated Ethernet PHY and HDMI-CEC at the cost of slightly higher power and reduced SMPS flexibility, while the i.MX RT1189 trades TrustZone peripheral isolation and SFI acceleration for higher single-thread performance and larger on-chip memory-making it less optimal for certified secure firmware lifecycle management.
Availability
STM32H562AGI6 is available at Aetrix Electronics and suitable for industrial PLCs, smart energy meters, secure IoT gateways, and portable medical diagnostics requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for STM32H562AGI6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog devices for industrial, automotive, and consumer markets.
The STM32H5 series is ST's flagship secure MCU product line built on Arm Cortex-M33 with TrustZone, targeting PSA Certified Level 3 applications in industrial automation, smart infrastructure, and connected healthcare devices.
FAQ
What is the maximum operating temperature range for STM32H562AGI6?
The STM32H562AGI6 is rated for industrial temperature range: –40 °C to +105 °C ambient. This is validated per JEDEC JESD22-A108 and confirmed in Section 5.3.1 of DS14258 Rev 6. Operation beyond this range may cause timing violations or flash write failures due to voltage margin loss.
Does STM32H562AGI6 support external SDRAM, and what interface is used?
Yes, it supports external SDRAM up to 128 MB using the Flexible Memory Controller (FMC) with 16-bit data bus and standard SDRAM command protocol. The FMC also supports LPSDR SDRAM, PSRAM, NOR/NAND, and FRAM-configurable via RCC and FMC registers per RM0481 reference manual.
How many TrustZone-secured peripheral regions can be configured on STM32H562AGI6?
The STM32H562AGI6 implements up to eight configurable SAU (Security Attribution Unit) regions, allowing precise memory and peripheral address ranges to be marked as secure or non-secure. This is documented in Section 3.8 (GTZC) and Section 3.9 of DS14258 Rev 6.
Is the UFBGA169 package of STM32H562AGI6 RoHS and REACH compliant?
Yes, the UFBGA169 package is ECOPACK2 compliant-meeting RoHS Directive 2011/65/EU, REACH Regulation (EC) No. 1907/2006, and halogen-free requirements. Full compliance documentation is available in ST's "Environmental Compliance" database under part number STM32H562AGI6.
STM32H562AGI6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 169-UFBGA
- Series:
- STM32H5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 250MHz
- Connectivity:
- CANbus, FIFO, I2C, IrDA, LINbus, SCI, SDIO, SMBus, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, PDR, POR, PWM, SHA, TRNG, Voltage Detect, WDT
- Number of I/O:
- 136
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 640K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 20x12b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32H562AGI6 FAQ
1.How can I place an order for STM32H562AGI6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32H562AGI6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32H562AGI6 reliable?
The price and inventory of STM32H562AGI6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32H562AGI6 is usually 5 days.
3.What payment methods are accepted for STM32H562AGI6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32H562AGI6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32H562AGI6?
STM32H562AGI6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32H562AGI6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32H562AGI6?
For technical support, including STM32H562AGI6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32H562AGI6 requirements.
6.How does Aetrix verify that STM32H562AGI6 is sourced from the original manufacturer or authorized distributors?
All STM32H562AGI6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32H562AGI6 meets industry standards.
7.What is the process for return or replacement of STM32H562AGI6?
All STM32H562AGI6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32H562AGI6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32H562AGI6 part is unused and in its original packaging.
Return procedure for STM32H562AGI6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32H562AGI6 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

