STMicroelectronics STM32H562RIT6
- Part No.:
- STM32H562RIT6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
STM32H562RIT6.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,937
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Product details
Overview
STM32H562RIT6 from STMicroelectronics is a 32-bit Arm® Cortex®-M33 microcontroller with TrustZone® security, 250 MHz max clock, 2 Mbyte flash with ECC, 640 Kbyte SRAM (including ECC-enabled SRAM2/SRAM3), and integrated CORDIC/FMAC math accelerators. It targets secure industrial control, IoT edge nodes, and smart metering systems requiring high compute density and hardware-enforced isolation.
For engineers reviewing the STM32H562RIT6 datasheet, STM32H562RIT6 pinout, STM32H562RIT6 application, or STM32H562RIT6 equivalent, key selection criteria include TrustZone configuration support, dual-bank flash read-while-write capability, 140 I/Os with 5 V tolerance, and dual DMA controllers for offloading real-time signal processing tasks.
Technical Context
The device implements Armv8-M mainline security with configurable SAU regions and TrustZone-aware peripherals including GTZC-managed memory mapping, secure debug authentication, and SFI-based firmware installation. Its dual-cache ART Accelerator includes 8-Kbyte instruction cache and 4-Kbyte data cache to sustain zero-wait-state execution from flash and external memories.
Power management integrates an embedded LDO or configurable SMPS regulator (1.71–3.6 V supply), POR/PDR/PVD/BOR supervision, and multiple low-power modes (Sleep/Stop/Standby) with 4-Kbyte backup SRAM retention. Security features include NIST SP800-90B-compliant TRNG, ECDSA verification, HASH accelerator, and active tamper detection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, up to 250 MHz (375 DMIPS) |
| Flash Memory | 2 Mbyte embedded flash with ECC, two banks supporting read-while-write |
| SRAM | 640 Kbyte total: 64-Kbyte SRAM2 + 320-Kbyte SRAM3 (flexible ECC), 4-Kbyte backup SRAM |
| Math Accelerators | CORDIC for trigonometric functions; FMAC for digital filter computation |
| Security | TrustZone with 8 SAU regions; SFI; HASH; ECDSA; TRNG; 96-bit unique ID; active tampers |
| I/O Count | Up to 140 fast GPIOs, most 5 V-tolerant; ten I/Os support independent 1.08 V supply |
| Package | LQFP64 (10 × 10 mm), 64-pin quad flat pack with exposed thermal pad |
Pinout & Package
LQFP64 package: 10 × 10 mm body, 0.5 mm pitch, exposed thermal pad on underside, RoHS-compliant ECOPACK2 finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Power supply inputs | 1.71–3.6 V digital/analog/core supply; VDDIO2 supports independent 1.08–3.6 V for selected I/Os |
| VSS, VSSA | Ground references | Digital/analog ground planes; separation required for noise-sensitive ADC/DAC operation |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; accepts external push-button or supervisor IC assertion |
| BOOT0 | Boot mode selection | High at power-up enables system memory bootloader; controlled via external resistor or MCU pin |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | Configurable as GPIO, alternate function (USART/SPI/I2C/etc.), or analog input; most tolerate 5 V |
| PC13–PC15 | RTC-related pins | PC13 = RTC_OUT; PC14/PC15 = 32.768 kHz LSE crystal connections for calendar/timekeeping |
Key Features
| Feature | Design Value |
|---|---|
| ART Accelerator with dual cache | Enables 0-wait-state execution from flash and external memories, reducing code latency in deterministic real-time loops |
| TrustZone with GTZC controller | Hardware-enforced isolation between secure/non-secure firmware domains, enabling certified secure boot and runtime attestation |
| Flexible memory controller (FMC) | Supports SRAM, PSRAM, SDRAM/LPSDR, FRAM, NOR/NAND - enabling scalable external memory expansion without FPGA glue logic |
| Octo-SPI interface | Direct connection to serial PSRAM/NAND/NOR and HyperRAM/HyperFlash, eliminating need for parallel bus interfaces in memory-constrained designs |
| Dual GPDMA controllers | Offloads CPU during high-bandwidth transfers (e.g., ADC→SRAM, SPI→flash), preserving M33 cycles for control algorithms |
Applications
| Industrial PLC Controller | Secure Smart Meter |
|---|---|
Use Scenario: Real-time motion control in compact programmable logic controllers with fieldbus connectivity and safety monitoring. IC Role / Device Role / Timing Role: Main application processor executing ladder logic, managing EtherCAT/PROFINET stacks, and driving PWM outputs for servo drives. Use Value: 250 MHz Cortex-M33 + CORDIC/FMAC accelerates PID loop computation and encoder position decoding while TrustZone isolates safety-critical firmware. | Use Scenario: Tamper-resistant electricity/water/gas meter with encrypted data logging, remote firmware updates, and metrology-grade ADC sampling. IC Role / Device Role / Timing Role: Secure system-on-chip handling metrology acquisition (dual 12-bit ADC @ 5 Msps), cryptographic signing (ECDSA), and secure OTA updates (SFI). Use Value: Integrated TRNG, HASH, and secure debug authentication meet IEC 62443-3-3 and DLMS/COSEM security requirements without external secure elements. |
| Edge AI Sensor Hub | USB-C Power Delivery Endpoint |
Use Scenario: Low-power wireless sensor node performing local ML inference (e.g., anomaly detection) before cloud upload via LoRaWAN or cellular modem. IC Role / Device Role / Timing Role: Edge inference engine using FMAC-accelerated FIR filters and CORDIC-based feature extraction on raw sensor streams. Use Value: 640 Kbyte SRAM enables on-device model caching; LPUART + low-power timers support sub-μA sleep modes between inference bursts. | Use Scenario: USB Type-C port controller for industrial docking stations requiring PD 3.1 compliance, display alt-mode negotiation, and VCONN switching. IC Role / Device Role / Timing Role: UCPD peripheral manages PD policy engine, BMC physical layer, and sideband use (SBU) signaling per USB-C spec r3.1. Use Value: Hardware UCPD block eliminates software stack complexity; integrated SMPS regulator supplies 5 V/20 V rails directly from AC adapter input. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32H563VIT6 | Same core/peripherals but adds Ethernet MAC + USB HS PHY; 100-pin LQFP package | Required for wired industrial networking (EtherNet/IP, Modbus TCP); larger footprint and BOM cost | Select when 10/100 Mbps Ethernet connectivity is mandatory and PCB space allows LQFP100 |
| STM32U575ZIT6 | Lower clock (160 MHz), smaller flash (2 Mbyte), no CORDIC/FMAC, reduced TrustZone configurability | Suitable for cost-sensitive secure IoT endpoints without intensive math workloads | Choose for battery-powered sensors where ultra-low active/sleep current outweighs compute density needs |
Compared with STM32H563VIT6, the STM32H562RIT6 trades Ethernet/USB HS for compact LQFP64 packaging and lower system-level EMI; versus STM32U575ZIT6, it delivers higher deterministic throughput for control loops and richer hardware security primitives at higher power budget.
Availability
STM32H562RIT6 is available at Aetrix Electronics and suitable for industrial automation, smart utility metering, and secure edge AI applications requiring stable component supply across multi-year production lifecycles.
Supply support for STM32H562RIT6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power devices, sensors, and analog ICs for industrial, automotive, and consumer markets.
The STM32H5 series targets high-assurance embedded systems demanding Arm TrustZone security, deterministic real-time performance, and hardware math acceleration - specifically engineered for industrial control, secure metering, and edge AI endpoints.
FAQ
What is the maximum operating frequency and associated performance metric?
The STM32H562RIT6 operates at up to 250 MHz, delivering 375 DMIPS (Dhrystone 2.1) and 1023 CoreMark®. This performance level is sustained via the ART Accelerator's 8-Kbyte instruction cache, which enables zero-wait-state execution from embedded flash memory under typical operating conditions.
Does this MCU support hardware-based secure boot and firmware updates?
Yes. The device implements Secure Firmware Installation (SFI) with TrustZone-enforced secure boot flow, HASH hardware accelerator for image integrity verification, and ECDSA signature validation. These features enable cryptographically authenticated firmware updates compliant with PSA Certified Level 3 and IEC 62443-3-3 standards.
What are the supported low-power modes and their typical current consumption?
The MCU offers Sleep, Stop, and Standby modes. In Standby mode with RTC and 4-Kbyte backup SRAM active, typical current is 0.8 μA (at 25°C, VDD = 3.3 V). Stop mode with SRAM retention draws ~1.8 μA. All modes retain TrustZone state and support wake-up via EXTI, RTC alarm, or tamper event.
Which external memory interfaces are available and what protocols do they support?
The Flexible Memory Controller (FMC) supports SRAM, PSRAM, SDRAM/LPSDR, FRAM, and NOR/NAND memories with up to 16-bit data bus width. The Octo-SPI interface supports serial PSRAM/NAND/NOR, HyperRAM, and HyperFlash in single/dual/octal I/O modes - both interfaces operate independently and concurrently with CPU execution.
STM32H562RIT6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 64-LQFP
- Series:
- STM32H5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 250MHz
- Connectivity:
- CANbus, FIFO, I2C, IrDA, LINbus, SCI, SDIO, SMBus, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, PDR, POR, PWM, SHA, TRNG, Voltage Detect, WDT
- Number of I/O:
- 53
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 640K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 16x12b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32H562RIT6 FAQ
1.How can I place an order for STM32H562RIT6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32H562RIT6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32H562RIT6 reliable?
The price and inventory of STM32H562RIT6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32H562RIT6 is usually 5 days.
3.What payment methods are accepted for STM32H562RIT6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32H562RIT6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32H562RIT6?
STM32H562RIT6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32H562RIT6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32H562RIT6?
For technical support, including STM32H562RIT6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32H562RIT6 requirements.
6.How does Aetrix verify that STM32H562RIT6 is sourced from the original manufacturer or authorized distributors?
All STM32H562RIT6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32H562RIT6 meets industry standards.
7.What is the process for return or replacement of STM32H562RIT6?
All STM32H562RIT6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32H562RIT6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32H562RIT6 part is unused and in its original packaging.
Return procedure for STM32H562RIT6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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