STMicroelectronics STM32H562VGT6TR
- Part No.:
- STM32H562VGT6TR
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
STM32H562VGT6TR.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:3,779
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Product details
Overview
STM32H562VGT6TR from STMicroelectronics is a 32-bit Arm® Cortex®-M33 microcontroller with TrustZone® security, FPU, and 250 MHz max clock frequency. It integrates 2 Mbyte flash with ECC, 640 Kbyte SRAM (including ECC-protected banks), CORDIC/FMAC math accelerators, dual FDCAN, USB Type-C®/PD controller, and 140 5 V-tolerant GPIOs. Used in secure industrial gateways requiring real-time control, encrypted firmware updates, and multi-protocol connectivity.
For engineers reviewing the STM32H562VGT6TR datasheet, STM32H562VGT6TR pinout, STM32H562VGT6TR application, or STM32H562VGT6TR equivalent, key selection criteria include TrustZone-enforced peripheral isolation, dual-bank read-while-write flash for seamless OTA updates, SMPS regulator support for 1.71–3.6 V operation, and hardware-accelerated ECDSA/SHA for secure boot.
Technical Context
The device implements Armv8-M mainline security with configurable SAU regions and GTZC to enforce memory/peripheral access separation between secure and non-secure worlds. Its dual GPDMA controllers offload CPU during high-bandwidth transfers across Octo-SPI, FMC, and SDMMC interfaces.
ART Accelerator includes 8-Kbyte instruction cache and 4-Kbyte data cache, enabling zero-wait-state execution from flash and external memories. The CORDIC coprocessor accelerates trigonometric functions while FMAC handles FIR/IIR filtering - both accessible via dedicated DMA channels without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, up to 250 MHz (375 DMIPS) |
| Memory | 2 Mbyte flash (ECC, two banks, RWW), 640 Kbyte SRAM (64-Kbyte SRAM2 + 320-Kbyte SRAM3, both with flexible ECC) |
| Clocks | Internal: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 kHz LSI; External: 4–50 MHz HSE, 32.768 kHz LSE |
| Security | TrustZone-aware peripherals, SFI, HASH/ECDSA/RNG accelerators, 96-bit unique ID, active tampers |
| Analog | Two 12-bit ADCs (5 Msps), one dual-channel 12-bit DAC, digital temperature sensor (NIST SP800-90B compliant) |
| Interfaces | Four I2C (Fm+), one I3C, twelve U(S)ART/LPUART, six SPI/I2S, two SAI, two FDCAN, Ethernet MAC, USB FS host/device, UCPD |
| Power | 1.71–3.6 V supply; embedded LDO or external SMPS support; Sleep/Stop/Standby low-power modes |
Pinout & Package
LQFP64 (10 × 10 mm) package with exposed thermal pad; RoHS-compliant, ECOPACK2 certified.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Power supply inputs | Separate analog/digital rails; VDDIO2 supports independent 1.08–3.6 V I/O supply for mixed-voltage interfacing |
| VSS, VSSA | Ground references | Dedicated analog ground improves ADC/DAC SNR; multiple VSS pins reduce impedance in high-speed switching |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/O | Up to 140 fast GPIOs; most 5 V-tolerant; configurable pull-up/down, alternate functions mapped across 16 AF registers |
| NRST | Reset input | Active-low reset with internal pull-up; accepts 1.65–5.5 V logic; supports tamper-triggered secure reset |
| BOOT0 | Boot mode selection | High at power-up enables system memory boot; used with SWD for factory firmware recovery |
| SWCLK, SWDIO | Debug interface | Serial Wire Debug (SWD) pins supporting authenticated debug and trace via ETM; no JTAG required |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-enforced peripheral isolation | Eight configurable SAU regions enable hardware-gated access to peripherals like FDCAN, UCPD, and RNG - critical for secure bootloader partitioning |
| Dual-bank flash with RWW | Enables concurrent execution from Bank 1 while updating Bank 2, eliminating downtime during field firmware upgrades |
| SMPS regulator interface | Direct control of external step-down converter reduces system power loss by ~30% vs. LDO-only designs at >100 mA load |
| CORDIC + FMAC co-processors | Offloads CPU for motor control (sin/cos/atan) and digital filtering (FIR/IIR), freeing 45% CPU cycles in real-time audio processing |
| Octo-SPI with HyperRAM/NOR support | Single 8-line interface replaces parallel NOR/PSRAM buses, cutting PCB layer count and routing complexity in HMI applications |
Applications
| Industrial PLC Controller | Secure Smart Meter |
|---|---|
Use Scenario: Real-time deterministic control of I/O modules, motion axes, and HMI over EtherCAT and CANopen. IC Role / Device Role / Timing Role: Main application processor executing RTOS, managing dual FDCAN for fieldbus comms, and running CORDIC-based PID loops at 10 kHz. Use Value: TrustZone isolates secure firmware update handler from control tasks; SMPS support extends battery life in portable commissioning tools. | Use Scenario: Tamper-resistant electricity meter with remote firmware update, metrology ADC sampling, and secure SE communication. IC Role / Device Role / Timing Role: Secure root-of-trust MCU hosting TF-M, validating signed firmware images before installation into protected flash bank. Use Value: Hardware ECDSA verification completes in <12 ms; 96-bit UID binds cryptographic keys to physical device identity. |
| Medical Patient Monitor | USB-C Power Delivery Hub |
Use Scenario: Multi-parameter bedside monitor acquiring ECG, SpO₂, and temperature with local display and cloud upload. IC Role / Device Role / Timing Role: Central controller interfacing 12-bit ADCs at 5 Msps, driving SAI-connected audio codec, and encrypting data via HASH accelerator. Use Value: Dual 12-bit DAC channels generate precise calibration signals; backup SRAM retains patient history during brownout. | Use Scenario: Multi-port USB-C hub negotiating power contracts, monitoring VBUS, and switching DP/PCIe lanes. IC Role / Device Role / Timing Role: UCPD controller managing PD 3.1 communication, coupled with FDCAN for inter-chip coordination in modular hub designs. Use Value: Integrated UCPD PHY eliminates external transceiver; hardware CRC and timer peripherals ensure strict PD timing compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32H563VGT6TR | Adds Ethernet MAC with DMA, HDMI-CEC, and camera interface (DCMI); identical core, memory, and security features | Required for wired industrial IoT nodes needing TCP/IP stack offload or video capture | Select when Ethernet or DCMI functionality is mandatory; otherwise identical footprint and firmware compatibility |
| NXP i.MX RT1187CVM8B | Arm Cortex-M7 + M33 dual-core; 1 MB on-chip RAM; no integrated SMPS controller; different TrustZone implementation | Better suited for asymmetric multiprocessing (e.g., Linux + RTOS), but lacks UCPD and Octo-SPI HyperRAM support | Choose for higher single-thread performance or Linux coexistence; avoid if USB-C PD or serial PSRAM expansion is needed |
Compared with STM32H562VGT6TR, STM32H563VGT6TR adds Ethernet and DCMI at no cost to security or power efficiency, while i.MX RT1187 requires external PD PHY and offers no direct replacement for Octo-SPI-based memory expansion.
Availability
STM32H562VGT6TR is available at Aetrix Electronics and suitable for industrial PLCs, secure smart meters, medical monitors, and USB-C PD hubs requiring stable component supply, long-term lifecycle assurance, and full traceability.
Supply support for STM32H562VGT6TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in microcontrollers, power management, sensors, and automotive ICs.
The STM32H5 series targets high-security, high-performance embedded applications - designed specifically for industrial control, energy metering, and medical devices demanding certified secure boot, cryptographic acceleration, and robust real-time behavior.
FAQ
What is the maximum operating frequency and associated performance metric?
The STM32H562VGT6TR operates at up to 250 MHz, delivering 375 DMIPS (Dhrystone 2.1) and 1023 CoreMark®. This performance is sustained using the ART Accelerator's 8-Kbyte instruction cache, which enables zero-wait-state execution from embedded flash across all operating voltages and temperatures.
Does this MCU support hardware-based secure firmware installation (SFI)?
Yes - SFI is implemented via TrustZone-secured ROM bootloader and dedicated hardware engines including HASH, PKA, and RNG. It validates ECDSA-signed firmware images against public keys stored in OTP, enforces signature chain-of-custody, and writes only to designated secure flash regions under SAU protection.
How does the dual-bank flash architecture improve field upgrade reliability?
Dual-bank flash allows simultaneous read from one bank and write/erase to the other. During OTA updates, application code continues executing from Bank 1 while new firmware is validated and written to Bank 2. A verified bank swap occurs atomically at reset, eliminating risk of bricking due to power loss mid-update.
Can the SMPS regulator interface be used without external components?
No - the SMPS interface requires an external inductor, capacitor, and MOSFET driver. The MCU provides PWM output, current-sense input, and enable/control logic, but does not integrate power switches. Designers must select compatible external SMPS ICs (e.g., ST's ST1PS01) or discrete buck controllers meeting voltage/current requirements.
STM32H562VGT6TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 100-LQFP
- Series:
- STM32H5
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 250MHz
- Connectivity:
- CANbus, FIFO, I2C, IrDA, LINbus, SCI, SDIO, SMBus, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, PDR, POR, PWM, SHA, TRNG, Voltage Detect, WDT
- Number of I/O:
- 80
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 640K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 16x12b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32H562VGT6TR FAQ
1.How can I place an order for STM32H562VGT6TR through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32H562VGT6TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32H562VGT6TR reliable?
The price and inventory of STM32H562VGT6TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32H562VGT6TR is usually 5 days.
3.What payment methods are accepted for STM32H562VGT6TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32H562VGT6TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32H562VGT6TR?
STM32H562VGT6TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32H562VGT6TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32H562VGT6TR?
For technical support, including STM32H562VGT6TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32H562VGT6TR requirements.
6.How does Aetrix verify that STM32H562VGT6TR is sourced from the original manufacturer or authorized distributors?
All STM32H562VGT6TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32H562VGT6TR meets industry standards.
7.What is the process for return or replacement of STM32H562VGT6TR?
All STM32H562VGT6TR units undergo pre-shipment inspection (PSI). If there is an issue with STM32H562VGT6TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32H562VGT6TR part is unused and in its original packaging.
Return procedure for STM32H562VGT6TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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